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PDF MAX539 Data sheet ( Hoja de datos )
| Número de pieza | MAX539 | |
| Descripción | +5V / Low-Power / Voltage-Output / Serial 12-Bit DACs | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MAX539 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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19-0172; Rev 6; 2/97
+5V, Low-Power, Voltage-Output,
Serial 12-Bit DACs
_______________General Description
The MAX531/MAX538/MAX539 are low-power, voltage-
output, 12-bit digital-to-analog converters (DACs) speci-
fied for single +5V power-supply operation. The MAX531
can also be operated with ±5V supplies. The
MAX538/MAX539 draw only 140µA, and the MAX531
(with internal reference) draws only 260µA. The
MAX538/MAX539 come in 8-pin DIP and SO packages,
while the MAX531 comes in 14-pin DIP and SO pack-
ages. All parts have been trimmed for offset voltage,
gain, and linearity, so no further adjustment is necessary.
The MAX538’s buffer is fixed at a gain of +1 and the
MAX539’s buffer at a gain of +2. The MAX531’s internal
op amp may be configured for a gain of +1 or +2, as
well as for unipolar or bipolar output voltages. The
MAX531 can also be used as a four-quadrant multiplier
without external resistors or op amps.
For parallel data inputs, see the MAX530 data sheet.
_______________________Applications
Battery-Powered Test Instruments
Digital Offset and Gain Adjustment
Battery-Operated/Remote Industrial Controls
Machine and Motion Control Devices
Cellular Telephones
________________Functional Diagram
(MAX531 ONLY)
REFOUT REFIN
(MAX531 ONLY)
BIPOFF
AGND
CLR
(MAX531
ONLY)
CS
SCLK
DIN
2.048V
REFERENCE
(MAX531 ONLY)
MAX531
MAX538
MAX539
POWER-UP
RESET
CONTROL
LOGIC
DAC
DAC REGISTER
(12 BITS)
SHIFT REGISTER
(LSB) (12 BITS) (MSB)
4
BITS
RFB
(MAX531
ONLY)
VOUT
VDD
DGND
(MAX531
ONLY)
VSS
(MAX531
ONLY)
DOUT
___________________________Features
o Operate from Single +5V Supply
o Buffered Voltage Output
o Internal 2.048V Reference (MAX531)
o 140µA Supply Current (MAX538/MAX539)
o INL = ±1/2LSB (max)
o Guaranteed Monotonic over Temperature
o Flexible Output Ranges:
0V to VDD (MAX531/MAX539)
VSS to VDD (MAX531)
0V to 2.6V (MAX531/MAX538)
o 8-Pin SO/DIP (MAX538/MAX539)
o Power-On Reset
o Serial Data Output for Daisy-Chaining
______________Ordering Information
PART
TEMP. RANGE
MAX531ACPD
MAX531BCPD
MAX531ACSD
MAX531BCSD
MAX531BC/D
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
ERROR
(LSB)
14 Plastic DIP ±1/2
14 Plastic DIP ±1
14 SO
±1/2
14 SO
±1
Dice*
±1
Ordering Information continued at end of data sheet.
*Dice are specified at TA = +25°C only.
_________________Pin Configurations
TOP VIEW
DIN 1
SCLK 2
CS 3
DOUT 4
MAX538
MAX539
8 VDD
7 VOUT
6 REFIN
5 AGND
DIP/SO
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
1 page  
+5V, Low-Power, Voltage-Output,
Serial 12-Bit DACs
ELECTRICAL CHARACTERISTICS—Dual Supplies (MAX531 Only) (continued)
(VDD = +5V ±10%, VSS = -5V ±10%, AGND = DGND = 0V, REFIN = 2.048V (external), RFB = BIPOFF = VOUT, CREFOUT = 33µF,
RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
VOLTAGE OUTPUT (VOUT)
Output Voltage Range
Output Load Regulation
Short-Circuit Current
DYNAMIC PERFORMANCE
MAX531 (G = +1)
MAX531 (G = +2)
VOUT = 2V, RL = 2kΩ
ISC
VSS + 2
VSS + 0.4
12
VDD - 2
VDD - 0.4
1
V
LSB
mA
Voltage-Output Slew Rate
SR
0.15 0.25
V/µs
Voltage-Output Settling Time
To ±1/2LSB, VOUT = 2V
25 µs
Digital Feedthrough
Step 000 hex to FFF hex
5 nV-s
Signal-to-Noise plus Distortion
REFIN = 1kHz, 2Vp-p, (G = +1)
SINAD
REFIN = 1kHz, 2Vp-p, (G = +2)
68
dB
68
POWER SUPPLY
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Current
Negative Supply Current
SWITCHING CHARACTERISTICS
CS Setup Time
SCLK Fall to CS Fall Hold Time
SCLK Fall to CS Rise Hold Time
SCLK High Width
SCLK Low Width
DIN Setup Time
DIN Hold Time
DOUT Valid Propagation Delay
CS High Pulse Width
CLR Pulse Width
CS Rise to SCLK Rise Setup Time
VDD
VSS
IDD
ISS
tCSS
tCSH0
tCSH1
tCH
tCL
tDS
tDH
tDO
tCSW
tCLR
tCS1
All inputs = 0V or VDD, no load
All inputs = 0V or VDD, no load
CL = 50pF
4.5 5.5
-5.5 0
260 400
-120 -200
20
15
0
35
35
45
0
80
20
25
50
V
V
µA
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 2:
Note 3:
Note 4:
Note 5:
In single-supply operation, INL and GE calculated from code 11 to code 4095. Tested at VDD = +5V.
This specification applies to both gain-error power-supply rejection ratio and offset-error power-supply rejection ratio.
Guaranteed by design.
Tested at IOUT = 100µA. The reference can typically source up to 5mA (see Typical Operating Characteristics).
_______________________________________________________________________________________ 5
5 Page 
+5V, Low-Power, Voltage-Output,
Serial 12-Bit DACs
SCLK
MAX531
MAX538
MAX539
DIN
CS
DOUT
SK
SO
MICROWIRE
PORT
I/O
SI
THE DOUT-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE
DEVICE, BUT MAY BE USED FOR VERIFYING DATA TRANSFER .
Figure 4. Microwire Connection
+5V
REFIN
VDD
REFOUT
BIPOFF
33µF
AGND MAX531
DGND
RFB
VOUT
VOUT
SCLK
MAX531
MAX538
MAX539
DIN
CS
SCK
MOSI SPI
PORT
I/O
DOUT
MISO
CPOL = 0, CPHA = 0
THE DOUT-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE
DEVICE, BUT MAY BE USED FOR VERIFYING DATA TRANSFER .
Figure 5. SPI/QSPI Connection
+5V
REFIN
VDD
REFOUT
33µF
BIPOFF MAX531
AGND
RFB
DGND
VOUT
VOUT
VSS
0V TO -5V
G = +1
Figure 6. Unipolar Configuration (0V to +2.048V Output)
Table 1. Unipolar Binary Code Table
(0V to VREFIN Output), Gain = +1
INPUT
1111 1111 1111
1000 0000 0001
1000 0000 0000
0111 1111 1111
0000 0000 0001
OUTPUT
4095
(VREFIN) 4096
2049
(VREFIN) 4096
2048
(VREFIN) 4096 = +VREFIN / 2
2047
(VREFIN) 4096
1
(VREFIN) 4096
0000 0000 0000
OV
G = +2
VSS
0V TO -5V
Figure 7. Unipolar Configuration (0V to +4.096V Output)
Table 2. Unipolar Binary Code Table
(0V to 2VREFIN Output), Gain = +2
INPUT
1111 1111 1111
1000 0000 0001
1000 0000 0000
0111 1111 1111
0000 0000 0001
0000 0000 0000
OUTPUT
4095
+2 (VREFIN) 4096
2049
+2 (VREFIN) 4096
+2
(VREFIN)
2048
4096
=
+VREFIN
2047
+2 (VREFIN) 4096
+2
(VREFIN)
1
4096
OV
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MAX539.PDF ] | |
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