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PDF MC10H603 Data sheet ( Hoja de datos )
| Número de pieza | MC10H603 | |
| Descripción | 9-Bit Latch ECL/TTL Translator | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC10H603, MC100H603
9−Bit Latch ECL to TTL
Translator
Description
The MC10H/100H603 is a 9−bit, dual supply ECL to TTL
translator. Devices in the ON Semiconductor 9−bit translator series
utilize the 28−lead PLCC for optimal power pinning, signal
flow−through and electrical performance.
The devices feature a 48 mA TTL output stage, and AC
performance is specified into both a 50 pF and 200 pF load
capacitance. Latching is controlled by Latch Enable (LEN), and
Master Reset (MR) resets the latches. A HIGH on OEECL sends the
outputs into the high impedance state. All control inputs are ECL
level.
The 10H version is compatible with MECL 10Ht ECL logic levels.
The 100H version is compatible with 100K levels.
Features
• 9−Bit Ideal for Byte−Parity Applications
• 3−State TTL Outputs
• Flow−Through Configuration
• Extra TTL and ECL Power Pins to Minimize Switching Noise
• Dual Supply
• 6.0 ns Max Delay into 50 pF, 12 ns into 200 pF
(all Outputs Switching)
• PNP TTL Inputs for Low Loading
• Pb−Free Packages are Available*
http://onsemi.com
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxH603G
AWLYYWW
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 10
1
Publication Order Number:
MC10H603/D
1 page  
MC10H603, MC100H603
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
http://onsemi.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC10H603.PDF ] | |
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