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PDF MC10H116 Data sheet ( Hoja de datos )

Número de pieza MC10H116
Descripción Triple Line Receiver
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MC10H116
Triple Line Receiver
Description
The MC10H116 is a triple differential amplifier designed for use in
sensing differential signals over long lines and is a functional/pinout
duplication of the MC10116, with 100% improvement in propagation
delay and no increase in power supply current. For termination
information see AND8020.
Features
Propagation Delay, 1.0 ns Typical
Power Dissipation 85 mW Typ/Pkg (same as MECL 10K)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K Compatible
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
42
53
96
10 7
12 14
13 15
11
VBB*
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
When input pin with
bubble goes positive
it’s respective output
pin with bubble goes
positive.
*VBB to be used to supply bias to the MC10H116 only and bypassed
(when used) with 0.01ĂmF to 0.1 mF capacitor to ground (0 V). VBB can
source < 1.0 mA.
The MC10H116 is designed to be used in sensing differential signals
over long lines. The bias supply (VBB) is made available to make the
device useful as a Schmitt trigger, or in other applications where a
stable reference voltage is necessary.
Active current sources provide these receivers with excellent
commonmode noise rejection. If any amplifier in a package is not
used, one input of that amplifier must be connected to VBB to prevent
unbalancing the currentsource bias network.
The MC10H116 does not have internalinput pulldown resistors.
This provides high impedance to the amplifier input and facilitates
differential connections.
Applications:
Low Level Receiver Voltage Level
Schmitt Trigger
Interface
Figure 1. Logic Diagram
www.onsemi.com
16
1
20
1
16
1
PDIP16
PLCC20
SOIC16
P SUFFIX
FN SUFFIX
D SUFFIX
CASE 64808 CASE 77502 CASE 751B05
MARKING DIAGRAMS*
16
MC10H116P
AWLYYWWG
1
120
10H116G
AWLYYWW
16
10H116G
AWLYWW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
*For additional marking information, refer to
Application Note AND8002/D.
VCC1 1 16 VCC2
AOUT 2 15 COUT
AOUT 3 14 COUT
AIN 4 13 CIN
AIN 5 12 CIN
BOUT 6 11 VBB
BOUT 7 10 BIN
VEE 8
9 BIN
Pin assignment is for DualinLine Package.
For PLCC pin assignment, see TND309, the Pin Conversion Tables,
page 9.
Figure 2. Dip Pin Assignment
ORDERING INFORMATION
Device
Package
Shipping
MC10H116DG
SOIC16
(Pb-Free)
48 Units/Tube
MC10H116DR2G
SOIC16
(Pb-Free)
2500/Tape & Reel
MC10H116FNG
PLCC20
(Pb-Free)
46 Units/Tube
MC10H116FNR2G
PLCC20
(Pb-Free)
500/Tape & Reel
MC10H116PG
PDIP16
(Pb-Free)
25 Units/Tube
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
August, 2016 Rev. 11
1
Publication Order Number:
MC10H116/D

1 page




MC10H116 pdf
MC10H116
PACKAGE DIMENSIONS
PDIP16
CASE 64808
ISSUE V
DA
16 9 H E
E1
1
NOTE 8
b2
TOP VIEW
8
e/2
c
B END VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
NOTE 3
L
A1
D1
C
SEATING
PLANE
M
e
16X b
eB
END VIEW
SIDE VIEW
0.010 M C A M B M
NOTE 6
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
INCHES
DIM MIN MAX
A −−−− 0.210
A1 0.015 −−−−
A2 0.115 0.195
b 0.014 0.022
b2 0.060 TYP
C 0.008 0.014
D 0.735 0.775
D1 0.005 −−−−
E 0.300 0.325
E1 0.240 0.280
e 0.100 BSC
eB −−−− 0.430
L 0.115 0.150
M −−−− 10 °
MILLIMETERS
MIN MAX
−−− 5.33
0.38 −−−
2.92 4.95
0.35 0.56
1.52 TYP
0.20 0.36
18.67 19.69
0.13 −−−
7.62 8.26
6.10 7.11
2.54 BSC
−−− 10.92
2.92 3.81
−−− 10 °
STYLE 1:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. CATHODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
15. ANODE
16. ANODE
STYLE 2:
PIN 1. COMMON DRAIN
2. COMMON DRAIN
3. COMMON DRAIN
4. COMMON DRAIN
5. COMMON DRAIN
6. COMMON DRAIN
7. COMMON DRAIN
8. COMMON DRAIN
9. GATE
10. SOURCE
11. GATE
12. SOURCE
13. GATE
14. SOURCE
15. GATE
16. SOURCE
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
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www.onsemi.com
5
ON Semiconductor Website: www.onsemi.com
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For additional information, please contact your local
Sales Representative
MC10H116/D

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