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PDF MC10E156 Data sheet ( Hoja de datos )
| Número de pieza | MC10E156 | |
| Descripción | 3-BIT 4:1 MUX-LATCH | |
| Fabricantes | ON Semiconductor | |
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MC10E156, MC100E156
5V ECL 3-Bit 4:1 Mux-Latch
Description
The MC10E/100E156 contains three 4:1 multiplexers followed by
transparent latches with differential outputs. When both Latch Enables
(LEN1, LEN2) are LOW, the latch is transparent, and output date is
controlled by the multiplexer select controls (SEL0, SEL1). A logic
HIGH on either LEN1 or LEN2 (or both) latches the outputs. The
Master Reset (MR) overrides all other controls to set the Q outputs
LOW.
The 100 Series contains temperature compensation.
Features
• 950 ps Max. D to Output
• 850 ps Max. LEN to Output
• Differential Outputs
• Asynchronous Master Reset
• Dual Latch-Enables
• PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
• NECL Mode Operating Range: VCC= 0 V
with VEE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
• Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 271 devices
• Pb−Free Packages are Available*
http://onsemi.com
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxE156FNG
AWLYYWW
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 8
1
Publication Order Number:
MC10E156/D
1 page  
MC10E156, MC100E156
Table 8. AC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 9)
0°C 25°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min
fMAX
tPLH
tPHL
Maximum Toggle Frequency
Propagation Delay to Output
700 1100
700 1100
700
D
SEL0
SEL1
LEN
MR
400
550
450
350
350
600 900 400
775 1050 550
650 900 450
500 800 350
600 825 350
600 900 400
775 1050 550
650 900 450
500 800 350
600 825 350
85°C
Typ
1100
600
775
650
500
600
Max
900
1050
900
800
825
Unit
MHz
ps
ts Setup Time
D
SEL0
SEL1
400
700
600
275
300
400
400 275
700 300
600 400
400 275
700 300
600 400
ps
th Hold Time
D
SEL0
SEL1
300
100
200
−275
−300
−400
300 −275
100 −300
200 −400
300 −275
100 −300
200 −400
ps
tRR Reset Recovery Time
tPW Minimum Pulse Width
800 600
MR 400
800 600
400
800 600
400
ps
ps
tSKEW
tJITTER
tr
tf
Within-Device Skew (Note 10)
Random Clock Jitter (RMS)
Rise/Fall Time
(20 - 80%)
50 50 50 ps
< 1 < 1 < 1 ps
ps
275 475 700 275 475 700 275 475 700
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. 10 Series: VEE can vary −0.46 V / +0.06 V.
100 Series: VEE can vary −0.46 V / +0.8 V.
10. Within-device skew is defined as identical transitions on similar paths through a device.
Driver
Device
Q
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
http://onsemi.com
5
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MC10E156.PDF ] | |
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