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PDF LMC6036 Data sheet ( Hoja de datos )

Número de pieza LMC6036
Descripción Low Power 2.7V Single Supply CMOS Operational Amplifiers
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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January 2000
LMC6035/LMC6036
Low Power 2.7V Single Supply CMOS Operational
Amplifiers
General Description
The LMC6035/6 is an economical, low voltage op amp ca-
pable of rail-to-rail output swing into loads of 600.
LMC6035 is available in a chip sized package (8-Bump mi-
cro SMD) using National’s micro SMD package technology.
Both allow for single supply operation and are guaranteed
for 2.7V, 3V, 5V and 15V supply voltage. The 2.7 supply volt-
age corresponds to the End-of-Life voltage (0.9V/cell) for
three NiCd or NiMH batteries in series, making the
LMC6035/6 well suited for portable and rechargeable sys-
tems. It also features a well behaved decrease in its specifi-
cations at supply voltages below its guaranteed 2.7V opera-
tion. This provides a “comfort zone” for adequate operation
at voltages significantly below 2.7V. Its ultra low input cur-
rents (IIN) makes it well suited for low power active filter ap-
plication, because it allows the use of higher resistor values
and lower capacitor values. In addition, the drive capability of
the LMC6035/6 gives these op amps a broad range of appli-
cations for low voltage systems.
Features
(Typical Unless Otherwise Noted)
n LMC6035 in micro SMD Package
n Guaranteed 2.7V, 3V, 5V and 15V Performance
n Specified for 2 kand 600Loads
n Wide Operating Range: 2.0V to 15.5V
n Ultra Low Input Current: 20 fA
n Rail-to-Rail Output Swing
@ 600: 200 mV from either rail at 2.7V
@ 100 k: 5 mV from either rail at 2.7V
n High Voltage Gain: 126dB
n Wide Input Common-Mode Voltage Range
-0.1V to 2.3V at Vs = 2.7V
n Low Distortion: 0.01% at 10 kHz
Applications
n Filters
n High Impedance Buffer or Preamplifier
n Battery Powered Electronics
n Medical Instrumentation
Connection Diagrams
8-Pin SO/MSOP
8-Bump micro SMD
Top View
DS012830-1
14-Pin SO/TSSOP
Top View
(Bump Side Down)
DS012830-65
DS012830-2
Top View
© 2000 National Semiconductor Corporation DS012830
www.national.com

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LMC6036 pdf
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 2.7V, V= 0V, VCM = 1.0V, V O = 1.35V and RL >
1 M. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ Units
(Note 5)
SR Slew Rate
(Note 9)
1.5 V/µs
GBW
Gain Bandwidth Product
V + = 15V
1.4 MHz
θ m Phase Margin
G m Gain Margin
Amp-to-Amp Isolation
(Note 10)
48 ˚
17 dB
130 dB
en
Input-Referred Voltage Noise
f = 1 kHz
27
V CM = 1V
in
Input Referred Current Noise
f = 1 kHz
0.2
THD
Total Harmonic Distortion
f = 10 kHz, AV = −10
R L = 2 k, VO = 8 VPP
V + = 10V
0.01
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kin series with 100 pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of 30 mA over long term may adversely affect reliabilty.
Note 4: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)
−TA)/θ JA. All numbers apply for packages soldered directly onto a PC board with no air flow.
Note 5: Typical Values represent the most likely parametric norm or one sigma value.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+ = 15V, VCM = 7.5V and R L connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 3.5V VO 7.5V.
Note 8: Do not short circuit output to V+ when V+ is greater than 13V or reliability will be adversely affected.
Note 9: V+ = 15V. Connected as voltage follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 10: Input referred, V + = 15V and RL = 100 kconnected to 7.5V. Each amp excited in turn with 1 kHz to produce VO = 12 VPP.
Note 11: Guaranteed by design.
5 www.national.com

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LMC6036 arduino
1.0 Application Notes
1.1 Background
The LMC6035/6 is exceptionally well suited for low voltage
applications. A desirable feature that the LMC6035/6 brings
to low voltage applications is its output drive capability — a
hallmark for National’s CMOS amplifiers. The circuit of Fig-
ure 1 illustrates the drive capability of the LMC6035/6 at 3V
of supply. It is a differential output driver for a one-to-one au-
dio transformer, like those used for isolating ground from the
telephone lines. The transformer (T1) loads the op amps
with about 600of AC load, at 1 kHz. Capacitor C1 functions
to block DC from the low winding resistance of T1. Although
the value of C1 is relatively high, its load reactance (Xc) is
negligible compared to inductive reactance (XI) of T1.
DS012830-45
FIGURE 2. Output Swing Performance of
the LMC6035 per the Circuit of Figure 1
FIGURE 1. Differential Driver
DS012830-44
The circuit in Figure 1 consists of one input signal and two
output signals. U1A amplifies the input with an inverting gain
of −2, while the U1B amplifies the input with a noninverting
gain of +2. Since the two outputs are 180˚ out of phase with
each other, the gain across the differential output is 4. As the
differential output swings between the supply rails, one of
the op amps sources the current to the load, while the other
op amp sinks the current.
How good a CMOS op amp can sink or source a current is
an important factor in determining its output swing capability.
The output stage of the LMC6035/6 — like many op
amps — sources and sinks output current through two
complementary transistors in series. This “totem pole” ar-
rangement translates to a channel resistance (Rdson) at each
supply rail which acts to limit the output swing. Most CMOS
op amps are able to swing the outputs very close to the
rails — except, however, under the difficult conditions of low
supply voltage and heavy load. The LMC6035/6 exhibits ex-
ceptional output swing capability under these conditions.
The scope photos of Figure 2 and Figure 3 represent mea-
surements taken directly at the output (relative to GND) of
U1A, in Figure 1. Figure 2 illustrates the output swing capa-
bility of the LMC6035, while Figure 3 provides a benchmark
comparison. (The benchmark op amp is another low voltage
(3V) op amp manufactured by one of our reputable
competitors.)
DS012830-46
FIGURE 3. Output Swing Performance of
Benchmark Op Amp per the Circuit of Figure 1
Notice the superior drive capability of LMC6035 when com-
pared with the benchmark measurement — even though the
benchmark op amp uses twice the supply current.
Not only does the LMC6035/6 provide excellent output swing
capability at low supply voltages, it also maintains high open
loop gain (A VOL) with heavy loads. To illustrate this, the
LMC6035 and the benchmark op amp were compared for
their distortion performance in the circuit of Figure 1. The
graph of Figure 4 shows this comparison. The y-axis repre-
sents percent Total Harmonic Distortion (THD plus noise)
across the loaded secondary of T1. The x-axis represents
the input amplitude of a 1 kHz sine wave. (Note that T1 loses
about 20% of the voltage to the voltage divider of RL (600)
and T1’s winding resistances — a performance deficiency of
the transformer.)
11 www.national.com

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