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PDF TDA9206 Data sheet ( Hoja de datos )
| Número de pieza | TDA9206 | |
| Descripción | I2C BUS CONTROLLED 130MHz RGB PREAMPLIFIER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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TDA9206
I2C BUS CONTROLLED 130MHz RGB PREAMPLIFIER
. 130MHz TYPICAL BANDWIDTH AT 2VPP
OUTPUT WITH 12pF CAPACITIVE LOAD
. 2.8ns TYPICAL RISE/FALL TIME AT 2VPP
OUTPUT WITH 12pF CAPACITIVE LOAD
. POWERFULL OUTPUT DRIVE CAPABILITY
. BRT, CONT, DRIVE, OUTPUT DC LEVEL,
OSD CONTRAST, BACK-PORCH CLAMPING
PULSE WIDTH ARE I2C BUS CONTROLLED
. INTERNAL BACK-PORCH CLAMPING
PULSE GENERATOR
. OSD WHITE BALANCE TRACKING
. INTERNAL OSD SWITCHES
. BLANKING AND FAST-BLANKING INPUTS
. VERY LARGE DRIVE ADJUSTMENT RANGE
(48dB)
. SEMI-TRANSPARENT BACKGROUND ON
OSD PICTURE
DIP24
(Plastic Package)
ORDER CODE : TDA9206
PIN CONNECTIONS
DESCRIPTION
The TDA9206 is a digitaly controlled wideband
video preamplifier intended for use in high resolu-
tion color monitor. All controls and adjustments are
digitaly performed thanks to I2C serial bus. Con-
trast, brightness and DC output level of RGB sig-
nals are common to the 3 channels and drive
adjustment is separate for each channel. Three I2C
gain controlled OSD inputs can be switched with
RGB signals using fast blanking command. Clamp-
ing of RGB signals is performed thanks to a flexible
integrated system. The white balance adjustment
is effective on brightness, video and OSD signals.
The TDA9206works for application usingAC or DC
coupled CRT driver.
Because of its features and due to component
saving the TDA9206 leads to a very performantand
cost effective application.
September 1996
IN1
OSD1
AVDD
IN2
OSD2
AGND
IN3
OSD3
LVDD
LGND
SDA
SCL
1
2
3
4
5
6
7
8
9
10
11
12
24 HSYNC
23 PVCC1
22 OUT1
21 PGND1
20 PVCC2
19 OUT2
18 PGND2
17 PVCC3
16 OUT3
15 PGND3
14 BLK
13 FBLK
1/12
1 page  
FUNCTIONAL DESCRIPTION (continued)
Figure 4 : Waveforms (DRIVE adjustment)
HS YNC
BP CP
BLK
Video IN
FBLK
OSD IN
TDA9206
VOUT1, VOUT2, VOUT3
VOS D
VBR T
VC O NT
VBLACK
VDC
Two examples
of drive a djus tme nt (1)
Note : 1. Drive a djus tm e nt modifies the following voltage s : VCONT, VBRT a nd VOSD.
Drive a djus tm e nt do not modify the following voltage s : VDC a nd VBLACK.
Figure 5 : I2C Write Operation
SCL
SDA
Start
I2C Slave Address
W
A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
ACK
Register Address
ACK
Data Byte
ACK Stop
QUICK REFERENCE DATA
Symbol
Parameter
Signal Bandwidth (2VPP/12pF load)
Rise and Fall Time (2VPP/12pF load)
Drive Adjustment Range on the 3 Channels separately
Maximum Output Voltage (VIN = 0.7 VPP)
Output Voltage Range (AC + DC)
Min.
Typ.
130
2.8
48
5
Max.
8
Unit
MHz
ns
dB
V
V
5/12
5 Page 
TDA9206
APPLICATION DIAGRAM
+12V
S YNCHRO
EXTRACTO R
47Ω 100nF
B
GND B
75Ω
R
GND R
47Ω 100nF
75Ω
G
GND G
47Ω 100nF
75Ω
1kΩ
1kΩ
100nF
1kΩ
100nF
1 IN1
2 OS D1
3 AVDD
4 IN2
5 OS D2
6 AGND
7 IN3
8 OS D3
9 LVDD
10 LGND
11 S DA
12 SCL
HS YNC 24
P VCC1 23
OUT1 22
T P GND1 21
D P VCC2 20
A OUT2 19
9
2 P GND2 18
0 P VCC3 17
6 OUT3 16
P GND3 15
BLK 14
FBLK 13
100nF
100nF
100nF
GND 1kΩ GND
BLUE OUT
RED OUT
GR EEN OUT
+5V
8MHz
1 FBLK
TEST 16
2 VSYNC S
B 15
3 HS YNC
4 VDD
5 P XCK
T
V
9
4
G 14
R 13
GND 12
6 CKOUT 2 RES ET 11
7 XTAL OUT 6
SDA 10
8 XTAL IN
SCL 9
+5V
100Ω
10µF
16V
22pF
S DA
I2C BUS
SCL
11/12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet TDA9206.PDF ] | |
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