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PDF TDA7565 Data sheet ( Hoja de datos )
| Número de pieza | TDA7565 | |
| Descripción | QUAD POWER AMPLIFIER WITH BUILT-IN VOLTAGE CONVERTER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TDA7565 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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TDA7565
QUAD POWER AMPLIFIER WITH BUILT-IN
VOLTAGE CONVERTER
PRODUCT PREVIEW
s DMOS POWER OUTPUT
s NON-SWITCHING HI-EFFICIENCY
AMPLIFIER
s SWITCHING HIGH EFFICIENCY VOLTAGE
CONVERTER
s HIGH OUTPUT POWER CAPABILITY 4x60W
EIAJ/4Ω
s FULL I2C BUS DRIVING:
– ST-BY
– INDEPENDENT FRONT/REAR SOFT PLAY/MUTE
– SELECTABLE GAIN 26dB - 12dB (FOR
LOW NOISE LINE OUTPUT FUNCTION)
– HIGH EFFICIENCY ENABLE/DISABLE
– VOLTAGE CONVERTER ENABLE/DISABLE
– REGULATED VOLTAGE SELECTION
– SWITCHING FREQUENCY SELECTION
s HARDWARE MUTE FUNCTION
s FULL FAULT PROTECTION
s DC OFFSET DETECTION
s FOUR INDEPENDENT SHORT CIRCUIT
PROTECTION
s CLIPPING DETECTOR WITH SELECTABLE
THRESHOLD (1%/10%) VIA I2C BUS
MULTIPOWER BCD TECHNOLOGY
MOSFET OUTPUT POWER STAGE
FLEXIWATT27
ORDERING NUMBER: TDA7565
DESCRIPTION
The TDA7565 is a new BCD technology QUAD
BRIDGE type of car radio amplifier in Flexiwatt27
package specially intended for car radio applica-
tions. Thanks to the DMOS output stage the
TDA7565 has a very low distortion allowing a clear
powerful sound. The built-in voltage converter
control block assures a very high output power
with an extremely low number of added compo-
nents.The dissipated power under average listen-
ing condition is alligned to the conventional
solutions (4x40W).
BLOCK DIAGRAM
MUTE
CLK DATA
VCC1
VCC2
CC GND
VS
IN RF
F
IN RR
R
IN LF
F
IN LR
R
SVR
I2C BUS
MUTE1 MUTE2
CLIP
DETECTOR
VOLTAGE
CONVERTER
CONTROL
VOLTAGE
MG CONVERTER
EXTERNAL
CIRCUIT
AC_GND
12/26dB
SHORT CIRCUIT
PROTECTION
12/26dB
SHORT CIRCUIT
PROTECTION
12/26dB
SHORT CIRCUIT
PROTECTION
12/26dB
SHORT CIRCUIT
PROTECTION
RF RR LF LR
PW_GND
TAB
S_GND
OUT RF+
OUT RF-
OUT RR+
OUT RR-
OUT LF+
OUT LF-
OUT LR+
OUT LR-
D00AU1232A
September 2003
This is preliminary information on a new product now in development. Details are subject to change without notice.
1/10
1 page  
TDA7565
I2C BUS INTERFACE
Data transmission from microprocessor to the TDA7565 and viceversa takes place through the 2 wires I2C BUS inter-
face, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 2, the data on the SDA line must be stable during the high period of the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 3 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 22).
The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so
that the SDAline is stable LOW during this clock pulse.
* Transmitter
master (µP) when it writes an address to the TDA7565
slave (TDA7565) when the µP reads a data byte from TDA7565
** Receiver
slave (TDA7565) when the µP writes an address to the TDA7565
master (µP) when it reads a data byte from TDA7565
Figure 2. Data Validity on the I2C BUS
SDA
Figure 3.
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
D99AU1031
Figure 4.
SCL
SDA
START
D99AU1032
I2CBUS
STOP
SCL 1 2 3 7 8 9
SDA
START
MSB
D99AU1033
ACKNOWLEDGMENT
FROM RECEIVER
5/10
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet TDA7565.PDF ] | |
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