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PDF LTC2402 Data sheet ( Hoja de datos )
| Número de pieza | LTC2402 | |
| Descripción | 1-/2-Channel 24-Bit uPower No Latency ADC in MSOP-10 | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC2402 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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LTC2401/LTC2402
1-/2-Channel 24-Bit µPower
No Latency ∆ΣTMADCs in MSOP-10
FEATURES
DESCRIPTIO
s 24-Bit ADCs in Tiny MSOP-10 Packages
s 4ppm INL, No Missing Codes
s 4ppm Full-Scale Error
s 0.5ppm Offset
s 0.6ppm Noise
s Single Conversion Settling Time for
Multiplexed Applications
s 1- or 2-Channel Inputs
s Automatic Channel Selection (Ping-Pong) (LTC2402)
s Zero Scale and Full Scale Set for Reference
and Ground Sensing
s Internal Oscillator—No External Components Required
s 110dB Min, 50Hz/60Hz Notch Filter
s Reference Input Voltage: 0.1V to VCC
s Live Zero—Extended Input Range Accommodates
12.5% Overrange and Underrange
s Single Supply 2.7V to 5.5V Operation
s Low Supply Current (200µA) and Auto Shutdown
U
APPLICATIO S
s Weight Scales
s Direct Temperature Measurement
s Gas Analyzers
s Strain Gauge Transducers
s Instrumentation
s Data Acquisition
s Industrial Process Control
The LTC®2401/LTC2402 are 1- and 2-channel 2.7V to 5.5V
micropower 24-bit analog-to-digital converters with an
integrated oscillator, 4ppm INL and 0.6ppm RMS noise.
These ultrasmall devices use delta-sigma technology and
a new digital filter architecture that settles in a single cycle.
This eliminates the latency found in conventional ∆Σ
converters and simplifies multiplexed applications.
Through a single pin, the LTC2401/LTC2402 can be
configured for better than 110dB rejection at 50Hz or
60Hz ±2%, or can be driven by an external oscillator for
a user defined rejection frequency in the range 1Hz to
120Hz. The internal oscillator requires no external fre-
quency setting components.
These converters accept an external reference voltage
from 0.1V to VCC. With an extended input conversion
range of –12.5% VREF to 112.5% VREF (VREF = FSSET –
ZSSET), the LTC2401/LTC2402 smoothly resolve the off-
set and overrange problems of preceding sensors or
signal conditioning circuits.
The LTC2401/LTC2402 communicate through a 2- or
3-wire digital interface that is compatible with SPI and
MICROWIRETM protocols.
, LTC and LT are registered trademarks of Linear Technology Corporation.
No Latency ∆Σ is a trademark of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corporation.
TYPICAL APPLICATIO
2.7V TO 5.5V
1µF
REFERENCE VOLTAGE
ZSSET + 0.1V TO VCC
ANALOG INPUT RANGE
ZSSET – 0.12VREF TO
FSSET + 0.12VREF
(VREF = FSSET – ZSSET)
0V TO FSSET – 100mV
1
VCC
10
FO
LTC2402
2
FSSET
9
SCK
3
CH1
SDO 8
4
CH0
7
CS
56
ZSSET GND
VCC
= INTERNAL OSC/50Hz REJECTION
= EXTERNAL CLOCK SOURCE
= INTERNAL OSC/60Hz REJECTION
3-WIRE
SPI INTERFACE
24012 TA01
Pseudo Differential Bridge Digitizer
1
VCC
2 LTC2402
FSSET SCK 9
4
CH0
8
SDO
3
CH1
CS 7
2.7V TO 5.5V
3-WIRE
SPI INTERFACE
5
ZSSET
GND
6
10
FO
INTERNAL OSCILLATOR
60Hz REJECTION
24012TA02
1
1 page  
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2401/LTC2402
Total Unadjusted Error (3V Supply)
10
VCC = 3V
VREF = 2.5V
5
TA = –55°C, –45°C, 25°C, 90°C
0
–5
125°C
–10
0
0.5 1.0 1.5 2.0
INPUT VOLTAGE (V)
2.5
24012 G01
Positive Extended Input Range
Total Unadjusted Error (3V Supply)
10
VCC = 3V
VREF = 2.5V
5
TA = –55°C, –45°C, 25°C, 90°C, 125°C
0
INL (3V Supply)
10
VCC = 3V
VREF = 2.5V
5
0
125°C
–5 TA = –55°C, –45°C, 25°C, 90°C
–10
0
0.5 1.0 1.5 2.0 2.5
INPUT VOLTAGE (V)
3.0
24012 G02
Total Unadjusted Error (5V Supply)
10
VCC = 5V
VREF = 5V
5
0 TA = –55°C, –45°C, 25°C, 90°C, 125°C
Negative Extended Input Range
Total Unadjusted Error (3V Supply)
10
TA = 25°C
TA = 90°C
5
TA = 125°C
0 TA = –45°C
–5 TA = –55°C
VCC = 3V
VREF = 2.5V
–10
–0.3 –0.25 –0.2
–0.15
–0.1
INPUT VOLTAGE (V)
–0.05
0
24012 G03
INL (5V Supply)
10
VCC = 5V
VREF = 5V
5 TA = –55°C, –45°C, 25°C, 90°C, 125°C
0
–5 –5 –5
–10
2.5
2.55 2.6 2.65 2.7
INPUT VOLTAGE (V)
2.75 2.8
24012 G04
Negative Extended Input Range
Total Unadjusted Error (5V Supply)
10
TA = 90°C
TA = 125°C
TA = 25°C
5
0
TA = –45°C
TA = –55°C
–5
VCC = 5V
VREF = 5V
–10
–0.3 –0.25
–0.2 –0.15 –0.1
INPUT VOLTAGE (V)
–0.05
0
24012 G07
–10
0
1 2 34
INPUT VOLTAGE (V)
5
24012 G05
Positive Extended Input Range
Total Unadjusted Error (5V Supply)
10
VCC = 5V
VREF = 5V
5
0 TA = –55°C
–5
–10
5.0
TA = –45°C
TA = 90°C
TA = 125°C
TA = 25°C
5.05 5.1 5.15 5.2 5.25 5.3
INPUT VOLTAGE (V)
24012 G08
–10
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
INPUT VOLTAGE (V)
24012 G06
Offset Error vs Reference Voltage
50
VCC = 5V
TA = 25°C
40
30
20
10
0
01 2 345
REFERENCE VOLTAGE (V)
24012 G09
5
5 Page 
LTC2401/LTC2402
APPLICATIO S I FOR ATIO
integrity of the conversion result and of the serial interface
mode selection which is performed at the initial power-up.
(See the 2-wire I/O sections in the Serial Interface Timing
Modes section.)
When the VCC voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with duration of approximately 0.5ms. The POR
signal clears all internal registers. Following the POR
signal, the LTC2401/LTC2402 start a normal conversion
cycle and follows the normal succession of states de-
scribed above. The first conversion result following POR
is accurate within the specifications of the device.
Reference Voltage Range
The LTC2401/LTC2402 can accept a reference voltage
(VREF = FSSET – ZSSET) from 0V to VCC. The converter
output noise is determined by the thermal noise of the
front-end circuits, and as such, its value in microvolts is
nearly constant with reference voltage. A decrease in
reference voltage will not significantly improve the
converter’s effective resolution. On the other hand, a
reduced reference voltage will improve the overall con-
verter INL performance. The recommended range for the
LTC2401/LTC2402 voltage reference is 100mV to VCC.
Input Voltage Range
The converter is able to accommodate system level
offset and gain errors as well as system level overrange
situations due to its extended input range, see Figure 2.
The LTC2401/LTC2402 convert input signals within the
extended input range of – 0.125 • VREF to 1.125 • VREF
(VREF = FSSET – ZSSET).
For large values of VREF (VREF = FSSET – ZSSET), this range
is limited by the absolute maximum voltage range of
– 0.3V to (VCC + 0.3V). Beyond this range, the input ESD
protection devices begin to turn on and the errors due to
the input leakage current increase rapidly.
Input signals applied to VIN may extend below ground by
– 300mV and above VCC by 300mV. In order to limit any
fault current, a resistor of up to 5k may be added in series
with the VIN pin without affecting the performance of the
device. In the physical layout, it is important to maintain
VCC + 0.3V
FSSET + 0.12VREF
FSSET
NORMAL
INPUT
RANGE
EXTENDED
INPUT
RANGE
ABSOLUTE
MAXIMUM
INPUT
RANGE
ZSSET
ZSSET – 0.12VREF
–0.3V
(VREF = FSSET – ZSSET)
24012 F02
Figure 2. LTC2401/LTC2402 Input Range
the parasitic capacitance of the connection between this
series resistance and the VIN pin as low as possible;
therefore, the resistor should be located as close as
practical to the VIN pin. The effect of the series resistance
on the converter accuracy can be evaluated from the
curves presented in the Analog Input/Reference Current
section. In addition, a series resistor will introduce a
temperature dependent offset error due to the input leak-
age current. A 1nA input leakage current will develop a
1ppm offset error on a 5k resistor if VREF = 5V. This error
has a very strong temperature dependency.
Output Data Format
The LTC2401/LTC2402 serial output data stream is 32 bits
long. The first 4 bits represent status information indicat-
ing the sign, selected channel, input range and conversion
state. The next 24 bits are the conversion result, MSB first.
The remaining 4 bits are sub LSBs beyond the 24-bit level
that may be included in averaging or discarded without
loss of resolution.
Bit 31 (first output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW when
the conversion is complete.
Bit 30 (second output bit) for the LTC2402, this bit is LOW
if the last conversion was performed on CH0 and HIGH for
CH1. This bit is always low for the LTC2401.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC2402.PDF ] | |
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