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PDF AN8029 Data sheet ( Hoja de datos )
| Número de pieza | AN8029 | |
| Descripción | Self-excited RCC pseudo-resonance type AC-DC switching power supply control IC | |
| Fabricantes | Panasonic Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AN8029 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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Voltage Regulators
AN8029
Self-excited RCC pseudo-resonance type
AC-DC switching power supply control IC
s Overview
The AN8029 is an IC developed for controlling the
self-excited switching power supply employing the RCC
pseudo-resonance type control method.
It is compact, equipped only with the necessary mini-
mum functions.
The maximum on-period and the minimum off-pe-
riod can be set separately by using the external capacitor
and resistor respectively.
It is suitable for the power supply of AV equipment.
2.4±0.25
6.0±0.3
3.3±0.25
Unit: mm
9
8
7
6
5
4
3
2
1
s Features
0.3
+0.1
–0.05
• Operating supply voltage range:
Stop voltage (8.6 V typical) to 34 V
• Output block employs the totem pole system.
3.0±0.3
SIP009-P-0000C
• Power MOSFET can be directly driven.
(output peak current: ±1 A maximum)
• Small pre-start operating current (95 µA typical) allows using a small size start resistor.
• Built-in pulse-by-pulse overcurrent protection function
• Incorporating the protection circuit against malfunction at low voltage (start/stop: 14.9 V/8.6 V)
• Built-in overvoltage protection function (externally resettable)
• Built-in timer latch function
• Equipped with frequency (VF) control function.
• 9-pin single inline package expands the freedom of board design
s Applications
• Televisions, facsimiles, printers, scanners, video equipment
s Block Diagram
Signal
U.V.L.O.
8.6 1.5
VV
8
TIM/OVP
VREF
(7.1 V)
TIM
FB 9
1
TDL
Low-side High-side
clamp clamp
0 V 2.8 V
Current source
Switch
diode
IFB
0.1 V
QQ
RS
latch
R
0.32 V
S
0.7 V
IN
IN
6
VOUT
5 GND
4
CLM
CLM
1
1 page  
Voltage Regulators
s Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
8
VCC
7.3 V
Comp.
5 µA
8
9 VCC
TON
9
AN8029
Description
TIM/OVP:
Terminal for use both OVP (overvoltage protec-
tion circuit) and timer latch.
[OVP]
When overvoltage signal of the power supply is
detected and high is inputted to the terminal, it
turns off the internal circuit. At the same time, it
holds that condition (latch). To reset the OVP latch,
the VCC should be decreased to a voltage lower
than the release voltage.
[Timer latch]
It detects the output voltage fall due to the
overcurrent condition of the power supply output
through the current level inputted to IFB. When
the IIFB decreases under the current of certain
value, the charge current flows in the capacitor
which is connected to this terminal. Then, when
the capacitor is charged up to the threshold volt-
age of the OVP, the OVP works so that the IC
could keep the operation stop condition.
FB:
Terminal for connecting the photocoupler for er-
ror voltage feedback of the power supply output.
It is possible to cancel about 180 mA of the dark
current of photocoupler.
I/O
I
I
s Application Notes
[1] Operation descriptions
1. Start/stop circuit block
• Start mechanism
When AC voltage is applied and the sup-
ply voltage reaches the start voltage through
the current from start resistance, the IC starts
operation. Then the power MOSFET driving
starts. Thereby, bias is generated in the trans-
former and the supply voltage is given from
the bias coil to the IC. (point a in figure 1)
During the period from the time when the
start voltage is reached and the voltage is gen-
erated in the bias coil to the time when the IC
is provided with a sufficient supply voltage,
the supply voltage of the IC is supplied by the
capacitor (C8) connected to VCC .
After AC rectification
Start resistance
R1
VCC
VOUT
GND
C8
Start
voltage
Stop
voltage
Before start
a
Start
Voltage supplied
from bias coil
Start condition
b
Figure 1
c Start failure
5
5 Page 
Voltage Regulators
AN8029
s Application Notes (continued)
[1] Operation descriptions (continued)
8. Timer latch (continued)
VO
Power supply
output voltage
0
IDS
Power MOSFET
current
0
Power supply stop
Time
Power supply stop
Time
VOVP
TIM/OVP
terminal voltage
0
Power supply stop
OVP
VTH = 7.3 V (typ.)
Time
Figure 10. Timer latch basic operation
9. Output block
In order to drive the power MOSFET which is a capacitive load at high speed, this IC is adopting the totem pole
(push-pull) type output circuit which performs the sink and source of the current with the NPN transistor as shown
in figure 10.
The maximum sink/source current is ± 0.1 A (DC) and the current at peak is ±1.0 A (Peak). The circuit is
provided with the sink capability even if the supply voltage VCC is under the stop voltage so that it turns off the
power MOSFET without fail.
The peak current capability is mainly required and a particularly too large current is not required constantly.
Because the power MOSFET becomes a capacitive load for the output, a large peak current is required for driving
it at a high speed. However, after the charge and discharge, a particularly large current is not required to keep such
condition. In the case of this IC, the peak current capability of ±1 A is ensured by taking a capacitance value of
the power MOSFET used into account.
The parasitic LC of the power MOSFET may
produce ringing to decrease the output pin under
the GND potential. When the voltage decrease of
the output pin becomes larger than the voltage drop
of diode and its voltage becomes negative, the
parasitic diode consisting of the substrate and
collector of the output NPN turns on. This phe-
Schottky barrier
diode
nomenon can cause the malfunction of device. In
such a case, the Schottky barrier diode should be
connected between the output and GND.
Figure 11
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet AN8029.PDF ] | |
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