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PDF CXP5078 Data sheet ( Hoja de datos )
| Número de pieza | CXP5078 | |
| Descripción | CMOS 4-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP5076/5078
CMOS 4-bit Single Chip Microcomputer
For the availability of this product, please contact the sales office.
Description
CXP5076/5078 is a CMOS 4-bit microcomputer
which consists of 4-bit CPU, ROM, RAM, I/O port,
8-bit timer, 8-bit timer/counter, 18-bit time base
timer, 8-bit serial I/O, vector interruption, power on
reset function, liquid crystal displayer (LCD)
controller/driver, D/A conversion 14-bit PWM output
port, a remote control reception circuit with noise
eliminating circuit, 3-bit A/D converters, a 32kHz
timer/event counter and a power supply voltage
detection reset function. They are integrated into a
single chip with the standby function, etc. which are
to be operated at a low power consumption.
80 pin QFP (Plastic)
Features
• Instruction cycle 1.9µs/4.19MHz
122 µs/32kHz
(Possible to select with the program)
• ROM capacity 8192 × 8 bits (CXP5078)
6144 × 8 bits (CXP5076)
• RAM capacity 448 × 4 bits (Including stack, display area)
• 43 general purpose I/O ports
• 8 high current output ports
• LCD controller/driver (Possible to direct drive)
— Possible to select with the program the segment output of 16 to 32
— Possible to select with the program the duty of static, 1/2, 1/3 and 1/4
— Possible to select with the program the bias of 1/2, 1/3
• 14-bit PWM output for D/A conversion
• Remote control reception circuit
• 3-bit A/D converter (8 channels per circuit)
• 32kHz timer/event counter
• Power supply voltage detection reset function
• Low voltage operation (2.5V) ..... when operating in 122µs/32kHz
• Rich wake-up function
• 8-bit/4-bit variable serial I/O
• Arithmetic and logical operations possible between the entire ROM area, I/O area and the accumulator by
means of the memory mapped I/O
• 8-bit timer, 8-bit timer/event counter and 18-bit time base timer, independently controlled
• 2 kinds of power down modes of sleep and stop
• Power on reset circuit (mask option)
• Provided with 80 pin plastic QFP
• Provided with 80 pin piggyback QFP (CXP5070)
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E88037A78-PS
1 page  
CXP5076/5078
Symbol
Name
PX0/SC
Port X0
Serial clock
PY3/EC
PY2/WP
Port Y3
Event count
input
Port Y2
Wake-up
input
PY1/PWM
Port Y1
PWM
generator
output
PY0 Port Y0
I/O Equivalent Circuit
Data
Output Select
Disable
Standby
(Note 2)
(Only during
tri-state output)
I/O
See Note 2) for the output
circuit format.
Schmitt inverter input
I
I Schmitt inverter input
Data
O Output Select (Note 1)
Disable
See Note 1) for the output
O circuit format.
PA0
to Port A
PA3
I/O
PB0/AD4
to
PB3/AD7
Port B
Analog voltage
input
I/O
Data
Output Select
Disable
Standby
(Only during
tri-state output)
(Note 2)
P
PE0
to
PE3
PF0
to
PF3
PI0/AD0
to
PI3/AD3
Port E
Port F
N
I/O
See Note 2) for the output
circuit format.
I/O Inverter input
Port I
Analog voltage
input
I/O
Description
Doubles as shift clock input/output pin
for the serial interface and as bit "0"
(input) of port X.
Doubles as event counter (8 bits) input
pin and as bit "3" (input) of port Y.
Doubles as wake-up input pin to
release the standby state and as bit
"2" (input) of port Y.
Doubles as PWM generator (14 bits)
output pin and as bit "1" (output) of
port Y.
Output pin for bit "0" of port Y.
This 4-bit input/output port permits its
each individual bit to be programmed
to serve either as input or output. For
the output format, a tri-state and pull-
up resistor possible to be programmed,
and it is also used as the standby
resetting pin.
This 4-bit input/output port has the
functions that are equivalent to those
of port A. It is also used for A/D
converter input.
This 4-bit input/output port permits its
each individual port to be programmed
to serve either as input or output. For
the output format, a tri-state and pull-
up resistor possible to be programmed.
This 4-bit input/output port has the
functions that are equivalent to those
of port E.
This 4-bit input/output port has the
functions that are equivalent to those
of port E.
It is also used for A/D converter input.
–5–
5 Page 
CXP5076/5078
∗1 The PC, PD, PG and PH show when the combined pins are selected as the port, and SEG16 to SEG31
show when the combined pins are selected as the segment output.
∗2 It is when the respective pins of PA to PI, PX0 and PX1 select the tri-state output circuit, and PY0 and PY1
are when the inverter output circuit is selected.
∗3 It is when the respective pins of PA to PI, PX0, PX1, PY0 and PY1 select the pull-up resistor.
∗4 The TEX pin specifies the input current when the crystal oscillation is selected by the mask option, and
specifies the leakage current when the schmitt input is selected.
∗5 The RST pin specifies the input current when the pull-up resistor is selected, and specifies leakage current
when non-resistor is selected.
∗6 The respective pins of PA, PB, PE, PF, PI, PX0 and PX1 specify the input current when the pull-up resistor
is selected, and specify the leakage current when the port state during using the tri-state output circuit or
standby is selected at high impedance.
∗7 The respective pins of PY0 and PY1 specify the input current when the pull-up resistor is selected, and
specify the leakage current when the port state during standby is selected at high impedance.
∗8 The respective pins of PX2, PY2, PY3, INT and RMC only specify the leakage current.
AC characteristics
(1) Clock timing
(Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V)
Item
Symbol
Pin
Condition
Min. Typ. Max. Unit
System clock frequency fc
XTAL
EXTAL
Fig. 1, Fig. 2
1 5 MHz
System clock input pulse tXL
width
tXH
System clock input rising tCR
and falling times
tCF
System clock frequency fCS
Event count clock input tEL
pulse width
tEH
EXTAL
TEX∗2
TX
EC
Fig. 1, Fig. 2
(External clock drive)
VDD = 2.5 to 5.5V
Fig. 3
Fig. 4
90 ns
200 ns
32.768
tsys∗1
+ 0.05
kHz
µs
Event count clock input tER
rising and falling times tEF
EC
Fig. 4
20 ms
Event count input clock tTL
input pulse width
tTH
TEX∗3
Fig. 4
10 µs
Event count input clock tTR
rising and falling times tTF
TEX∗3
Fig. 4
20 ms
∗1 tsys in the EXTAL input clock is 8/fc.
tsys in the TEX input clock is 4/fcs.
∗2 Specified when the crystal oscillation mode is selected by the mask option.
∗3 Specified when the counter mode is selected by the mask option.
Note) When adjusting the frequency accurately, there may be cases in which they may differ from Fig. 2.
– 11 –
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet CXP5078.PDF ] | |
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