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PDF BSS84 Data sheet ( Hoja de datos )
| Número de pieza | BSS84 | |
| Descripción | P-Channel Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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February 2013
BSS84
P-Channel Enhancement Mode Field-Effect Transistor
Features
-0.13 A, -50 V, RDS(ON) = 10 Ω at VGS = -5 V
Voltage-Controlled P-Channel Small-Signal
Switch
High-Density Cell Design for Low RDS(ON)
High Saturation Current
D
D
S
SOT-23
G
G
Absolute Maximum Ratings
S
Description
This P-channel enhancement-mode field-effect
transistor is produced using Fairchild’s proprietary,
high cell density, DMOS technology. This very high
density process minimizes on-state resistance and to
provide rugged and reliable performance and fast
switching. The BSS84 can be used, with a minimum
of effort, in most applications requiring up to 0.13 A
DC and can deliver current up to 0.52 A. This product
is particularly suited to low-voltage applications
requiring a low-current high-side switch.
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.
Symbol
VDSS
VGSS
ID
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current(1)
Maximum Power Dissipation(1)
Continuous
Pulsed
Derate Above 25°C
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
Ratings
−50
±20
−0.13
−0.52
0.36
2.9
−55 to +150
300
Unit
V
V
A
A
W
mW / °C
°C
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient(1)
350 °C/W
Note:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference
is defined as the solder mounting surface of the drain pins. RθJA is guaranteed by design, while RθJA is
determined by the user's board design.
a) 350°C/W when mounted on a minimum pad
Scale 1: 1 on letter-size paper.
Package Marking and Ordering Information
Device Marking
SP
Device
BSS84
Reel Size
7’’
Tape width
8mm
Quantity
3000
© 2002 Fairchild Semiconductor Corporation
BSS84 • Rev. 1.1.0
www.fairchildsemi.com
1 page  
Physical Dimension
SOT-23 3L
Figure 12. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packaging/tr/SOT23-3L_tr.pdf.
© 2002 Fairchild Semiconductor Corporation
BSS84 • Rev. 1.1.0
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet BSS84.PDF ] | |
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