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PDF MAX186 Data sheet ( Hoja de datos )

Número de pieza MAX186
Descripción Serial 12-Bit ADCs
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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EVALUATION KIT AVAILABLE
MAX186/MAX188
Low-Power, 8-Channel,
Serial 12-Bit ADCs
General Description
The MAX186/MAX188 are 12-bit data-acquisition sys-
tems that combine an 8-channel multiplexer, high-
bandwidth track/hold, and serial interface together with
high conversion speed and ultra-low power consump-
tion. The devices operate with a single +5V supply or
dual ±5V supplies. The analog inputs are software con-
figurable for unipolar/bipolar and single-ended/differen-
tial operation.
The 4-wire serial interface directly connects to SPI,
QSPI™ and MICROWIRE® devices without external
logic. A serial strobe output allows direct connection to
TMS320 family digital signal processors. The
MAX186/MAX188 use either the internal clock or an
external serial-interface clock to perform successive-
approximation A/D conversions. The serial interface can
operate beyond 4MHz when the internal clock is used.
The MAX186 has an internal 4.096V reference while the
MAX188 requires an external reference. Both parts have
a reference-buffer amplifier that simplifies gain trim .
The MAX186/MAX188 provide a hard-wired SHDN pin
and two software-selectable power-down modes.
Accessing the serial interface automatically powers up
the devices, and the quick turn-on time allows the
MAX186/MAX188 to be shut down between every con-
version. Using this technique of powering down
between conversions, supply current can be cut to
under 10µA at reduced sampling rates.
The MAX186/MAX188 are available in 20-pin PDIP and
SO packages, and in a shrink small-outline package
(SSOP), that occupies 30% less area than an 8-pin
PDIP. For applications that call for a parallel interface,
see the MAX180/MAX181 data sheet. For anti-aliasing
filters, consult the MAX274/MAX275 data sheet.
________________________Applications
Portable Data Logging
Data-Acquisition
High-Accuracy Process Control
Automatic Testing
Robotics
Battery-Powered Instruments
Medical Instruments
QSPI is a trademark of Motorola.
MICROWIRE is a registered trademark of National
Semiconductor.
____________________________Features
o 8-Channel Single-Ended or 4-Channel
Differential Inputs
o Single +5V or ±5V Operation
o Low Power: 1.5mA (Operating Mode)
2µA (Power-Down Mode)
o Internal Track/Hold, 133kHz Sampling Rate
o Internal 4.096V Reference (MAX186)
o SPI-/QSPI-/MICROWIRE-/TMS320-Compatible
4-Wire Serial Interface
o Software-Configurable Unipolar or Bipolar Inputs
o 20-Pin PDIP, SO, SSOP Packages
o Evaluation Kit Available
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX186_CPP+
0°C to +70°C 20 PDIP
MAX186_CWP+
0°C to +70°C 20 SO
MAX186_CAP+
0°C to +70°C 20 SSOP
MAX186DC/D
0°C to +70°C Dice*
MAX186_EPP+
-40°C to +85°C 20 PDIP
MAX186_EWP+
-40°C to +85°C 20 SO
MAX186_EAP+
-40°C to +85°C 20 SSOP
Ordering Information continued on last page.
Parts are offered in grades A, B, C and D (grades defined in
Electrical Characteristics). When ordering, please specify grade.
Contact factory for availability of A-grade in SSOP package.
*Dice are specified at +25°C, DC parameters only.
+Denotes a lead(Pb)-free/RoHS-compliant package.
____________________Pin Configuration
TOP VIEW
+
CH0 1
CH1 2
CH2 3
CH3 4
CH4 5
MAX186
MAX188
CH5 6
CH6 7
CH7 8
VSS 9
SHDN 10
20 VDD
19 SCLK
18 CS
17 DIN
16 SSTRB
15 DOUT
14 DGND
13 AGND
12 REFADJ
11 VREF
PDIP/SO/SSOP
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-0123; Rev 5; 1/12

1 page




MAX186 pdf
MAX186/MAX188
Low-Power, 8-Channel,
Serial 12-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 5V ±5%; VSS = 0V or -5V; fCLK = 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX186—
4.7µF capacitor at VREF pin; MAX188—external reference, VREF = 4.096V applied to VREF pin; TA = TMIN to TMAX, unless otherwise
noted.)
PARAMETER
Positive Supply Rejection
(Note 8)
Negative Supply Rejection
(Note 8)
SYMBOL
CONDITIONS
PSR
VDD = 5V ±5%; external reference, 4.096V;
full-scale input
PSR
VSS = -5V ±5%; external reference, 4.096V;
full-scale input
MIN TYP
±0.06
MAX
±0.5
±0.01 ±0.5
UNITS
mV
mV
TIMING CHARACTERISTICS
(VDD = 5V ±5%; VSS =0V or -5V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to Output Data Valid
CS Fall to Output Enable
CS Rise to Output Disable
CS to SCLK Rise Setup
CS to SCLK Rise Hold
SCLK Pulse Width High
SCLK Pulse Width Low
SCLK Fall to SSTRB
CS Fall to SSTRB Output Enable
(Note 6)
CS Rise to SSTRB Output Disable
(Note 6)
SSTRB Rise to SCLK Rise
(Note 6)
tAZ
tDS
tDH
tDO
tDV
tTR
tCSS
tCSH
tCH
tCL
tSSTRB
tSDV
tSTR
tSCK
CLOAD = 100pF
CLOAD = 100pF
CLOAD = 100pF
MAX18_ _C/E
CLOAD = 100pF
External clock mode only, CLOAD = 100pF
External clock mode only, CLOAD = 100pF
Internal clock mode only
1.5
100
20
100
0
200
200
0
µs
ns
0 ns
150 ns
100 ns
100 ns
ns
ns
ns
ns
200 ns
200 ns
200 ns
ns
Note 1: Tested at VDD = 5.0V; VSS = 0V; unipolar input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: MAX186 – internal reference, offset nulled; MAX188 – external reference (VREF = +4.096V), offset nulled.
Note 4: Ground on-channel; sine wave applied to all off channels.
Note 5: Conversion time defined as the number of clock cycles times the clock period; clock has 50% duty cycle.
Note 6: Guaranteed by design. Not subject to production testing.
Note 7: External load should not change during conversion for specified accuracy.
Note 8: Measured at VSUPPLY +5% and VSUPPLY -5% only.
Note 9: The common-mode range for the analog inputs is from VSS to VDD.
Maxim Integrated
5

5 Page





MAX186 arduino
MAX186/MAX188
Low-Power, 8-Channel,
Serial 12-Bit ADCs
Table 3. Channel Selection in Single-Ended Mode (SGL/DIFF = 1)
SEL2
0
1
0
1
0
1
0
1
SEL1
0
0
0
0
1
1
1
1
SEL0
0
0
1
1
0
0
1
1
CH0
+
CH1
+
CH2
+
CH3 CH4
+
+
CH5
+
CH6
+
CH7
+
AGND
Table 4. Channel Selection in Differential Mode (SGL/DIFF = 0)
SEL2
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
CH0
+
CH1
+
CH2
+
CH3
+
CH4
+
CH5
+
CH6 CH7
+–
–+
2) Use a general-purpose I/O line on the CPU to pull
CS on the MAX186/MAX188 low.
3) Transmit TB1 and simultaneously receive a byte
and call it RB1. Ignore RB1.
4) Transmit a byte of all zeros ($00 HEX) and simulta-
neously receive byte RB2.
5) Transmit a byte of all zeros ($00 HEX) and simulta-
neously receive byte RB3.
6) Pull CS on the MAX186/MAX188 high.
Figure 6 shows the timing for this sequence. Bytes RB2
and RB3 will contain the result of the conversion
padded with one leading zero and three trailing zeros.
The total conversion time is a function of the serial
clock frequency and the amount of dead time between
8-bit transfers. Make sure that the total conversion time
does not exceed 120µs, to avoid excessive T/H droop.
Digital Output
In unipolar input mode, the output is straight binary
(see Figure 15). For bipolar inputs, the output is
twos-complement (see Figure 16). Data is clocked out
at the falling edge of SCLK in MSB-first format.
Maxim Integrated
11

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