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Número de pieza | SP3494 | |
Descripción | +3.3V Low Power RS-485/RS-422 Transceiver | |
Fabricantes | Exar | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SP3494 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! SP3494
+3.3V Low Power
RS-485/RS-422 Transceiver
• Operates From A Single +3.3V Supply
• Interoperable With +5.0V Logic
• +/-200mV Receiver Input Sensitivity
• -7V to +12V Common-Mode Input Voltage Range
• Allows Up To 32 transceivers On The Serial Bus
• Driver/Receiver Enable Lines
• 10µA Low-Power Shutdown Mode
• Compatibility with the MAX3486 and 75176 Industry
Standard Pinout
DESCRIPTION
The SP3494 device is a +3.3V low power half-duplex transceiver that meets the specifications
of the RS-485 and RS-422 serial protocols. This device is pin-to-pin compatible with the Exar
SP3481 device as well as other popular industry standards. The SP3494 features the Exar
BiCMOS process, allowing low power operation without sacrificing performance. The partially
slew-rate limited drivers minimize EMI and reduce reflections caused by improperly terminated
cables allowing error-free data transmission.The SP3494 is a half-duplex partially slew-rate
limited transceiver that will deliver a data transmission rate up to 2.5Mbps. The SP3494 is
equipped with a low-power shutdown mode and driver/receiver high-Z enable lines.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3494_100_071012
1 page D
Vcc
VOD
R
R VOC
Figure 1. Driver DC Test Load Circuit
Test Circuits
VDM
GENERATOR
(NOTE 1)
D
50Ω
VCC
S1
R L = 27Ω
OUT
C L = 15pF
(NOTE 2)
VOM =
VOH + VOL
2
≈ 1.5V
Figure 2. Driver Propagation Delay Test Circuit
GENERATOR
(NOTE 1)
D
50Ω
VCC
CL
RL = OUT
60Ω
C L= 15pF (NOTE 2)
Figure 3. Driver Differential Output Delay and
Transition Time Circuit.
0V OR 3V
D
S1
GENERATOR
(NOTE 1)
50Ω
C L = 50pF
(NOTE 2)
VCC
R L = 110Ω
OUT
Figure 5. Driver Enable and Disable Timing Circuit,
Output Low
1.5V S3
-1.5V VID R
S1
1k VCC
S2
GENERATOR
(NOTE 1)
50Ω
CL= 15pF
(NOTE 2)
GENERATOR
(NOTE 1)
S1
D
50Ω
CL = 50pF
(NOTE 2)
OUT
RL = 110Ω
VOM =
VOH + VOL
2
≈ 1.5V
Figure 4. Driver Enable and Disable Timing Circuit,
Output High
GENERATOR
(NOTE 1)
V ID R
50Ω
OUT
CL = 15pF
(NOTE 2)
1.5V
0V
VOM = VCC
2
Figure 6. Receiver Propagation Delay Test Circuit
DE = 0 or Vcc
A/Y
DI = 0 or Vcc
D
B/Z
IOSD
100Ω
-7V to +12V V
Figure 7. Receiver Enable and Disable Timing
Circuit
Figure 8. Driver Short Circuit Current Limit Test
NOTE 1: The input pulse is supplied by a generator with the following characteristics:
PRR = 250kHz, 50% duty cycle, tR < 6.0ns, ZO = 50Ω.
NOTE 2: CL includes probe and stray capacitance.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3494_100_071012
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet SP3494.PDF ] |
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