E0C6266
q Analog Circuit Characteristics and Current Consumption
(Unless otherwise specified: VDD=0V, VSS=-2.2 to -5.5V, fOSC1=38.4kHz(crystal), fOSC3=500kHz(ceramic),
Ta=25°C, CG=10pF, CGC/CDC=108pF, VADJ=VL2, RA1/RA2=1MΩ, CS1/CL1–CL4/C1–C3=0.1µF)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
LCD drive voltage *1
VL1 Connect 1MΩ load resistor between VDD and VL1
0.50
0.45 V
(No panel load), VSS=-2.5 to -5.5V
×VL2
×VL2
VL2 Connect 1MΩ load resistor between VDD and VL2
-2.25
-2.10
-1.95
V
(No panel load), VSS=-2.5 to -5.5V
VL3 Connect 1MΩ load resistor between VDD and VL3
1.50
1.45 V
(No panel load), VSS=-2.5 to -5.5V
×VL2
×VL2
VL4 Connect 1MΩ load resistor between VDD and VL4
2.00
1.95 V
(No panel load), VSS=-2.5 to -5.5V
×VL2
×VL2
BLD voltage (internal)
VBLD1
-2.50
-2.35
-2.20
V
BLD voltage (external)
VBLD2
-1.13
-1.05
-0.97
V
BLD circuit stability time *2 tBLD
100 µS
BLD circuit current
IBLD VSS=-3.0V
10 20 µA
consumption
Analog comparator
VIP Noninverted input (CMPP)
VSS+0.3
-1.0 V
input voltage
VIM Inverted input (CMPM)
Analog comparator
VOF VIP=-1.0 to VSS+0.3V
50 mV
offset voltage
VIM=-1.0 to VSS+0.3V
Analog comparator
tCMP1 VIP=-1.0 to VSS+0.3V
100 µS
stabilizing time *2
VIM=-1.0 to VSS+0.3V
Analog comparator
tCMP2 VSS=-2.2V
100 µS
response time
VIP=-1.1V, VIM=-1.1±0.1V
Analog comparator
ICMP1 VSS=-3.0V
4 10 µA
current consumption (1)
VIP=-1.4V, VIM=-1.6V
Analog comparator
ICMP2 VSS=-3.0V
8 15 µA
current consumption (2)
VIP=-1.6V, VIM=-1.4V
Current consumption
IOP During HALT (1) *3
OSCC="0"
1.8 4.0 µA
During HALT (2) *4
No panel load
1.3 3.0 µA
During operation at 38.4kHz *3
9 15 µA
During operation at 500kHz *5 No panel load
110 150 µA
∗1: When selecting not to use LCD drive power by option, VDD (=0V) is output to VL2.
∗2: The stabilizing time is the time from turning the circuit on until the output data stabilizes.
∗3: The time base counter is RUN status, programmable timer, BLD circuit and analog comparator are OFF status, and the input and
output terminals are static status.
∗4: The same status as ∗1 and is when not using LCD drive power by option, and selecting DC output to the R12 port output form.
∗5: The BLD circuit and analog comparator are OFF status and the input and output terminals are static status.
q Oscillation Characteristics
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the follow-
ing characteristics as reference values.
OSC1 crystal oscillation circuit
(Unless otherwise specified: VDD=0V, VSS=-2.2 to -5.5V, Crystal: C2-TYPE(Seiko Epson), CG=25pF, CD=built-in, Ta=25°C)
Characteristic
Oscillation start time
Symbol
Condition
tsta VSS=-2.2 to -5.5V
Min.
Typ.
Max.
Unit
3 Sec
Built-in capacitance (drain)
Frequency/voltage deviation
CD For 60 pin plastic package
∂f/∂V VSS=-2.2 to -5.5V
– 20 – pF
5 ppm
Frequency/IC deviation
Frequency adjustment range
Permitted leak resistance
∂f/∂IC
∂f/∂CG CG=5 to 25pF
Rleak Between OSC1 and VDD, VS1
-10 10 ppm
40 ppm
200 MΩ
OSC3 ceramic oscillation circuit
(Unless otherwise specified: VDD=0V, VSS=-2.2 to -5.5V, Ceramic: CSB500E(Murata Mfg. Co.), CGC=CDC=108pF, Ta=25°C)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
Oscillation start time
tsta VSS=-2.2 to -5.5V
4 10 mS
5
