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PDF AD5114 Data sheet ( Hoja de datos )

Número de pieza AD5114
Descripción (AD5110 - AD5114) Nonvolatile Digital Potentiometer
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
Single-Channel, 128-/64-/32-Position, I2C, ±8%
Resistor Tolerance, Nonvolatile Digital Potentiometer
AD5110/AD5112/AD5114
FEATURES
Single-channel, 128-/64-/32-position resolution
5 kΩ, 10 kΩ, 80 kΩ nominal resistance
Maximum ±8% nominal resistor tolerance error
Low wiper resistance
±6 mA maximum wiper current density
Resistor tolerance stored in EEPROM (0.1% accuracy)
Rheostat mode temperature coefficient: 35 ppm/°C
Potentiometer mode temperature coefficient: 5 ppm/°C
2.3 V to 5.5 V single-supply operation
1.8 V to 5.5 V logic supply operation
Power-on EEPROM refresh time < 50 μs
I2C-compatible interface
Wiper setting and EEPROM readback
50-year typical data retention at 125°C
1 million write cycles
Wide operating temperature: −40°C to +125°C
Thin, 2 mm × 2 mm × 0.55 mm 8-lead LFCSP package
APPLICATIONS
Mechanical potentiometer replacement
Portable electronics level adjustment
Audio volume control
Low resolution DAC
LCD panel brightness and contrast control
Programmable voltage to current conversion
Programmable filters, delays, time constants
Feedback resistor programmable power supply
Sensor calibration
GENERAL DESCRIPTION
The AD5110/AD5112/AD5114 provide a nonvolatile solution
for 128-/64-/32-position adjustment applications, offering
guaranteed low resistor tolerance errors of ±8% and up to
±6 mA current density in the A, B, and W pins. The low resistor
tolerance, low nominal temperature coefficient and high
bandwidth simplify open-loop applications, as well as tolerance
matching applications.
The new low wiper resistance feature minimizes the wiper
resistance in the extremes of the resistor array to only 45 Ω,
typical.
The wiper settings are controllable through an I2C-compatible
digital interface that is also used to readback the wiper register
and EEPROM content. Resistor tolerance is stored within
EEPROM, providing an end-to-end tolerance accuracy of 0.1%.
FUNCTIONAL BLOCK DIAGRAM
VLOGIC
VDD
SDA
SCL
POWER-ON
RESET
AD5110/AD5112/AD5114
A
DATA
I2C
SERIAL
INTERFACE
DATA
EEPROM
RDAC
REGISTER
W
B
GND
Figure 1.
www.DataSheet.co.kr
The AD5110/AD5112/AD5114 are available in a 2 mm × 2 mm
LFCSP package. The parts are guaranteed to operate over the
extended industrial temperature range of −40°C to +125°C.
Table 1. ±8% Resistance Tolerance Family
Model Resistance (kΩ) Position
AD5110 10, 80
128
AD5111 10, 80
128
AD5112 5, 10, 80
64
AD5113 5, 10, 80
64
AD5116 5, 10, 80
64
AD5114 10, 80
32
AD5115 10, 80
32
Interface
I2C
Up/down
I2C
Up/down
Push-button
I2C
Up/down
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
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1 page




AD5114 pdf
Data Sheet
AD5110/AD5112/AD5114
ELECTRICAL CHARACTERISTICS—AD5112
5 kΩ, 10 kΩ, and 80 kΩ versions: VDD = 2.3 V to 5.5 V, VLOGIC = 1.8 V to VDD, VA = VDD, VB = 0 V, −40°C < TA < +125°C, unless otherwise noted.
Table 3.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resolution
Resistor Integral Nonlinearity2
Resistor Differential Nonlinearity2
Nominal Resistor Tolerance
Resistance Temperature Coefficient3
Wiper Resistance
DC CHARACTERISTICS—POTENTIOMETER
DIVIDER MODE
Integral Nonlinearity4
Differential Nonlinearity4
Full-Scale Error
Zero-Scale Error
Voltage Divider Temperature Coefficient3
RESISTOR TERMINALS
Maximum Continuous IA, IB, and IW
Current3
Terminal Voltage Range5
Capacitance A, Capacitance B3
Capacitance W3
Common-Mode Leakage Current3
DIGITAL INPUTS
Input Logic3
High
Low
Input Hysteresis3
Input Current3
Input Capacitance3
DIGITAL OUTPUT (SDA)
Output Low Voltage3
Three-State Leakage Current
Three-State Output Capacitance3
Symbol
N
R-INL
R-DNL
ΔRAB/RAB
(ΔRAB/RAB)/ΔT × 106
RW
RBS
RTS
INL
DNL
VWFSE
VWZSE
(ΔVW/VW)/ΔT × 106
CA, CB
CW
VINH
VINL
VHYST
IN
CIN
VOL
Test Conditions/Comments
RAB = 5 kΩ, VDD = 2.3 V to 2.7 V
RAB = 5 kΩ, VDD = 2.7 V to 5.5 V
RAB = 10 kΩ
RAB = 80 kΩ
Code = full scale
Code = zero scale
Code = bottom scale
Code = top scale
RAB = 5 kΩ
RAB =10 kΩ
RAB = 80 kΩ
RAB = 5 kΩ
RAB =10 kΩ
RAB = 80 kΩ
Code = half scale
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RAB = 5 kΩ, 10 kΩ
RAB = 80 kΩ
f = 1 MHz, measured to GND,
code = half scale, VW = VA =
2.5 V or VW = VB = 2.5 V
f = 1 MHz, measured to GND,
code = half scale,
VA = VB = 2.5 V
VA = VW = VB
VLOGIC = 1.8 V to 2.3 V
VLOGIC = 2.3 V to 5.5 V
VLOGIC = 1.8 V to 2.3 V
VLOGIC = 2.3 V to 5.5 V
ISINK = 3 mA
ISINK = 6 mA
Min
6
−2.5
−1
−1
−0.25
+1
−8
−0.5
−0.5
−2.5
−1.5
−1
Typ1
±0.5
±0.25
±0.25
±0.1
±0.25
35
70
45
70
±0.15
±0.15
−6
−1.5
GND
−500
±10
20
35
±15
0.8 × VLOGIC
0.7 × VLOGIC
0.1 × VLOGIC
5
−1
2
Max
+2.5
+1
+1
+0.25
+1
+8
140
80
140
+0.5
+0.5
1.5
1
0.25
+6
+1.5
VDD
+500
Unit
Bits
LSB
LSB
LSB
LSB
LSB
%
ppm/°C
Ω
Ω
Ω
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
ppm/°C
mA
mA
V
pF
pF
nA
0.2 × VLOGIC
0.3 × VLOGIC
±1
V
V
V
V
V
μA
pF
0.2 V
0.4 V
+1 μA
pF
Rev. 0 | Page 5 of 28
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AD5114 arduino
Data Sheet
AD5110/AD5112/AD5114
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 6.
Parameter
VDD to GND
VLOGIC to GND
VA, VW, VB to GND
IA, IW, IB
Pulsed1
Frequency > 10 kHz
RAW = 5 kΩ and 10 kΩ
RAW = 80 kΩ
Frequency ≤ 10 kHz
RAW = 5 kΩ and 10 kΩ
RAW = 80 kΩ
Continuous
RAW = 5 kΩ and 10 kΩ
RAW = 80 kΩ
Digital Inputs SDA and SCL
Operating Temperature Range3
Maximum Junction Temperature (TJ Max)
Storage Temperature Range
Reflow Soldering
Peak Temperature
Time at Peak Temperature
Package Power Dissipation
Rating
–0.3 V to +7.0 V
–0.3 V to +7.0 V
GND − 0.3 V to VDD + 0.3 V
±6 mA/d2
±1.5 mA/d2
±6 mA/√d2
±1.5 mA/√d2
±6 mA
±1.5 mA
−0.3 V to +7 V or VLOGIC + 0.3 V
(whichever is less)
−40°C to +125°C
150°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is defined by JEDEC specification JESD-51, and the value is
dependent on the test board and test environment.
Table 7. Thermal Resistance
Package Type
θJA θJC Unit
8-Lead LFCSP
901 25 °C/W
1 JEDEC 2S2P test board, still air (0 m/sec air flow).
ESD CAUTION
260°C
20 sec to 40 sec
(TJ max − TA)/θJA
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1 Maximum terminal current is bounded by the maximum current handling of
the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.
2 Pulse duty factor.
3 Includes programming of EEPROM memory.
Rev. 0 | Page 11 of 28
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