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PDF N02L83W2A Datasheet ( Hoja de datos )

Número de pieza N02L83W2A
Descripción 2Mb Ultra-Low Power Asynchronous CMOS SRAM 256Kx8 bit
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo

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N02L83W2A Hoja de datos, Descripción, Manual
N02L83W2Awww.DataSheet4U.com
2Mb Ultra-Low Power Asynchronous CMOS SRAM
256K × 8 bit
Overview
The N02L83W2A is an integrated memory device
containing a 2 Mbit Static Random Access Memory
organized as 262,144 words by 8 bits. The device
is designed and fabricated using ON
Semiconductor’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with two chip enable
(CE1 and CE2) controls and output enable (OE) to
allow for easy memory expansion. The
N02L83W2A is optimal for various applications
where low-power is critical such as battery backup
and hand-held devices. The device can operate
over a very wide temperature range of -40oC to
+85oC and is available in JEDEC standard
packages compatible with other standard 256Kb x
8 SRAMs
Features
• Single Wide Power Supply Range
2.3 to 3.6 Volts
• Very low standby current
2.0µA at 3.0V (Typical)
• Very low operating current
2.0mA at 3.0V and 1µs (Typical)
• Very low Page Mode operating current
0.8mA at 3.0V and 1µs (Typical)
• Simple memory control
Dual Chip Enables (CE1 and CE2)
Output Enable (OE) for memory expansion
• Low voltage data retention
Vcc = 1.8V
• Very fast output enable access time
30ns OE access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
Product Family
Part Number
Package Type
Operating
Power
Temperature Supply (Vcc)
Speed
Standby
Operating
Current (ISB), Current (Icc),
Typical
Typical
N02L83W2AT
32 - TSOP I
N02L83W2AN
N02L83W2AT2
32 - STSOP I
-40oC to +85oC
32 - TSOP I Green
2.3V - 3.6V
55ns @ 2.7V
70ns @ 2.3V
2 µA
2 mA @ 1MHz
N02L83W2AN2 32 - STSOP I Green
Pin Configuration
Pin Descriptions
A11
A9
A8
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
N02L83W2A
STSOP-I, TSOP-I
32 OE
31 A10
30 CE1
29 I/O7
28 I/O6
27 I/O5
26 I/O4
25 I/O3
24 VSS
23 I/O2
22 I/O1
21 I/O0
20 A0
19 A1
18 A2
17 A3
Pin Name
A0-A17
WE
CE1, CE2
OE
I/O0-I/O7
VCC
VSS
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Output Enable Input
Data Inputs/Outputs
Power
Ground
©2008 SCILLC. All rights reserved.
July 2008 - Rev. 8
Publication Order Number:
N02L83W2A/D

1 page

N02L83W2A pdf
N02L83W2A
www.DataSh
Timing Test Conditions
Item
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
Operating Temperature
Timing
Item
Read Cycle Time
Address Access Time
Chip Enable to Valid Output
Output Enable to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Write Pulse Width
Address Setup Time
Write Recovery Time
Write to High-Z Output
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
Symbol
tRC
tAA
tCO
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAW
tWP
tAS
tWR
tWHZ
tDW
tDH
tOW
0.1VCC to 0.9 VCC
5ns
0.5 VCC
CL = 30pF
-40 to +85 oC
2.3 - 3.6 V
Min.
Max.
70
70
70
35
10
5
0 20
0 20
10
70
50
50
40
0
0
20
40
0
5
2.7 - 3.6 V
Min.
Max.
55
55
55
30
10
5
0 15
0 15
10
55
45
45
35
0
0
15
35
0
5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 8 | Page 5 of 10 | www.onsemi.com

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