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Programmers Reference Manual - I386 - Intel

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I386 datasheet
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INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986
3.4.1 Boolean Operation Instructions............................................................................................................. 54
3.4.2 Bit Test and Modify Instructions ............................................................................................................ 55
3.4.3 Bit Scan Instructions .............................................................................................................................. 55
3.4.4 Shift and Rotate Instructions.................................................................................................................. 56
3.4.4.1 Shift Instructions ............................................................................................................................................... 56
3.4.4.2 Double-Shift Instructions .................................................................................................................................. 58
3.4.4.3 Rotate Instructions............................................................................................................................................. 59
3.4.4.4 Fast "BIT BLT" Using Double Shift Instructions.............................................................................................. 61
3.4.4.5 Fast Bit-String Insert and Extract ...................................................................................................................... 61
3.4.5 Byte-Set-On-Condition Instructions....................................................................................................... 64
3.4.6 Test Instruction ...................................................................................................................................... 64
3.5 CONTROL TRANSFER INSTRUCTIONS ............................................................................................................. 65
3.5.1 Unconditional Transfer Instructions...................................................................................................... 65
3.5.1.1 Jump Instruction ................................................................................................................................................ 65
3.5.1.2 Call Instruction .................................................................................................................................................. 66
3.5.1.3 Return and Return-From-Interrupt Instruction .................................................................................................. 66
3.5.2 Conditional Transfer Instructions.......................................................................................................... 66
3.5.2.1 Conditional Jump Instructions........................................................................................................................... 67
3.5.2.2 Loop Instructions............................................................................................................................................... 67
3.5.2.3 Executing a Loop or Repeat Zero Times ........................................................................................................... 68
3.5.3 Software-Generated Interrupts .............................................................................................................. 68
3.6 STRING AND CHARACTER TRANSLATION INSTRUCTIONS............................................................................... 69
3.6.1 Repeat Prefixes ...................................................................................................................................... 70
3.6.2 Indexing and Direction Flag Control .................................................................................................... 71
3.6.3 String Instructions.................................................................................................................................. 71
3.7 INSTRUCTIONS FOR BLOCK-STRUCTURED LANGUAGES................................................................................. 72
3.8 FLAG CONTROL INSTRUCTIONS ..................................................................................................................... 79
3.8.1 Carry and Direction Flag Control Instructions ..................................................................................... 79
3.8.2 Flag Transfer Instructions ..................................................................................................................... 79
3.9 COPROCESSOR INTERFACE INSTRUCTIONS..................................................................................................... 80
3.10 SEGMENT REGISTER INSTRUCTIONS ............................................................................................................ 81
3.10.1 Segment-Register Transfer Instructions............................................................................................... 82
3.10.2 Far Control Transfer Instructions ....................................................................................................... 82
3.10.3 Data Pointer Instructions..................................................................................................................... 82
3.11 MISCELLANEOUS INSTRUCTIONS ................................................................................................................. 83
3.11.1 Address Calculation Instruction .......................................................................................................... 83
3.11.2 No-Operation Instruction..................................................................................................................... 84
3.11.3 Translate Instruction............................................................................................................................ 84
CHAPTER 4 SYSTEMS ARCHITECTURE ..................................................................................................... 85
4.1 SYSTEMS REGISTERS ..................................................................................................................................... 85
4.1.1 Systems Flags......................................................................................................................................... 85
4.1.2 Memory-Management Registers ............................................................................................................ 87
4.1.3 Control Registers ................................................................................................................................... 87
4.1.4 Debug Register....................................................................................................................................... 88
4.1.5 Test Registers ......................................................................................................................................... 89
4.2 SYSTEMS INSTRUCTIONS................................................................................................................................ 89
CHAPTER 5 MEMORY MANAGEMENT ....................................................................................................... 91
5.1 SEGMENT TRANSLATION ............................................................................................................................... 92
5.1.1 Descriptors............................................................................................................................................. 92
5.1.2 Descriptor Tables................................................................................................................................... 94
5.1.3 Selectors................................................................................................................................................. 96
5.1.4 Segment Registers .................................................................................................................................. 97
5.2 PAGE TRANSLATION ...................................................................................................................................... 98
5.2.1 Page Frame............................................................................................................................................ 98
5.2.2 Linear Address ....................................................................................................................................... 98
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