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Multilayer Ceramic Capacitors - Multicomp

Número de pieza U0805CxxxxxT
Descripción Multilayer Ceramic Capacitors
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U0805CxxxxxT datasheet

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U0805CxxxxxT pdf
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Nickel Barrier
Multilayer Ceramic Capacitors
Item
Performance
Test or Inspection Method
Temperature
Characteristic
of Capacitance
Temperatures Coefficient
TC
Operating
Temperature
NPO -55 ~ +125°C
X7R -55 ~ +125°C
X5R -55 ~ +85°C
Y5V -55 ~ +125°C
Z5U -55 ~ +125°C
Capacitance
Change (DC)
0 ±30 (ppm/°C)
±15%
±15%
+22% ~ -82%
+22% ~ -56%
The temperature coefficient is determined using the
capacitance measured in step 3 as a reference. Test the
specimen from step 1through step 5, the capacitance shall
be within the specified tolerance for the capacitance
coefficient and capacitance change as left table.
Code
1
2
3
Temperature Coefficient
Base Temperature (25°C) ±2°C
Minimum Operation Temperature ±2°C
Base Temperature (25°C) ±2°C
4 Minimum Operation Temperature ±2°C
5 Base Temperature (25°C) ±2°C
Solderabiliy
New solder to over 95% of termination
Leaching
External
Appearance
No mechanical Damage
Completely soak both terminal electrodes in
solder at specified temperature for 3 ±0.5 second
a. For Tin-Lead Sn/Pb) Termination product:
235 ±5°C.
b. For Lead-free (Pure Sn) Termination
product: 245 ±5°C.
Completely soak both terminal electrodes in solder at 270
±5°C for 40 ±1second.
NPO
Capacitance
Change
(C/C)
X7R/X5
R
Z5U
Y5V
±2.5% or ±0.25 pF maximum
(Whichever is larger)
±7.5%
±20%
±20%
Soldering
to heat
NPO: C 30pF : Q 1000
C<30pF:Q 400 + 20°C
PS: C : Nominal Capacitance (pF)
X7R, X5R, Y5V, Z5U : (Maximum Value)
DF
T.C.
50V
25V
16V 10V
X7R/
X5R
2.5% 3.0% 3.5% 5.0%
Z5U 4.0% - - -
Y5V 5.0% 7.5% 9.0% 12.5%
Completely immerse both
terminations in solder at 270 ±5°C for 10 ±3 second.
Leave the capacitors in ambient condition for 2 4 ±2 hours
before measurement.
*Preconditioning: F(only for Class 2):
Perform a heat treatment at 150 +0-10°C for one hour and
then let sit for 24 ±2 hours at room temperature.
Perform the initial measurement.
NPO:
100,000MW minimum or R x C 1000W
IR
x F (Whichever is smaller)
X7R, X5R, Y5V, Z5U:
10,000MW minimum or R x C 1000W
x F (Whichever is smaller)
Page 5
27/04/06 V1.0

5 Page

U0805CxxxxxT arduino
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Nickel Barrier
Multilayer Ceramic Capacitors
Component Layout
When placing / mounting the capacitors / components near an area which is apt to bend or a grid groove on the PC board. It is
advisable to have both electrodes subjected to uniform stresses, or to position the component electrodes at right angles to the grid
groove or bending line.
Figure 3 Component Layout
Uneven mounting density
O: Proper
X: Improper
Probability at which the chip capacitor is broken by the stress on PC board break
A > B = C >D > E
Mounting Density and Spaces
Placements in too narrow spaces between components may cause “ Solder Bridges” during soldering. The minimum space between
components shall be 0.5mm in view of the positioning tolerances of the mounting machines and the dimensional tolerances of the
components and PC boards.
Applications of Solder Resist
Application of Solder Resist are effective to prevent solder bridges and to control amounts of solder on PC boards ( As shown in
Table 2).
Recommended Application Examples
Examples of Solder Bridges
Narrow Spacing
between Chip
Components
Radial Components
are directly
connected to
Chip Components
Common lands are
close to Chip
Components
Page 10
27/04/06 V1.0

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