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stops the oscillator and the functioning of the filters.
On the M-8870-01 models, this pin is tied to ground
(logic low).
Inhibit mode is enabled by a logic high input to pin 5
(INH). It inhibits the detection of 1633 Hz. The output
code will remain the same as the previous detected
code (see Pin functions table on page 4). On the M-
8870-01 models, this pin is tied to ground (logic low).
Input Configuration
The input arrangement of the M-8870 provides a dif-
ferential input operational amplifier as well as a bias
source (VREF) to bias the inputs at mid-rail. Provision
is made for connection of a feedback resistor to the
op-amp output (GS) for gain adjustment.
Tone Decoding
FLOW
697
FHIGH
1209
Key (ref.)
1
697 1336
697 1477
770 1209
2
3
4
770 1336
770 1477
852 1209
5
6
7
852 1336
852 1477
941 1336
8
9
0
941 1209
941 1477
697 1633
S
#
A
770 1633
852 1633
941 1633
B
C
D
ANY ANY
ANY
L = logic low, H = logic high, Z = high impedance
Differential Input Configuration
OE
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
M-8870
In a single-ended configuration, the input pins are
connected as shown in the Single - Ended Input
Configuration on page 3 with the op-amp connected
for unity gain and VREF biasing the input at 1/2VDD.
The Differential Input Configuration bellow permits
gain adjustment with the feedback resistor R5.
DTMF Clock Circuit
The internal clock circuit is completed with the addition
of a standard 3.579545 MHz television color burst crys-
tal. The crystal can be connected to a single M-8870 as
shown in the Single - Ended Input Configuration on
page 3, or to a series of M-8870s. As illustrated in the
Common Crystal Connection below, a single crystal
can be used to connect a series of M-8870s by cou-
pling the oscillator output of each M-8870 through a 30
pF capacitor to the oscillator input of the next M-8870.
Q4 Q3 Q2 Q1
0 001
0 010
0 011
0 100
0 101
0 110
0 111
1 000
1 001
1 010
1 011
1 100
1 101
1 110
1 111
0 000
Z ZZZ
Common Crystal Connection
Rev. 3 www.clare.com
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