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PDF AD5410 Data sheet ( Hoja de datos )

Número de pieza AD5410
Descripción Current Source DAC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
Single-Channel, 12-/16-Bit, Serial Input, 4 mA to
20 mA, Current Source DAC, HART Connectivity
AD5410/AD5420
FEATURES
12-/16-bit resolution and monotonicity
Current output ranges: 4 mA to 20 mA, 0 mA to 20 mA, or
0 mA to 24 mA
±0.01% FSR typical total unadjusted error (TUE)
±3 ppm/°C typical output drift
Flexible serial digital interface
On-chip output fault detection
On-chip reference (10 ppm/°C maximum)
Feedback/monitoring of output current
Asynchronous clear function
Power supply (AVDD) range
10.8 V to 40 V; AD5410AREZ/AD5420AREZ
10.8 V to 60 V; AD5410ACPZ/AD5420ACPZ
Output loop compliance to AVDD − 2.5 V
Temperature range: −40°C to +85°C
24-lead TSSOP and 40-lead LFCSP packages
APPLICATIONS
Process control
Actuator control
PLC
HART network connectivity
GENERAL DESCRIPTION
The AD5410/AD5420 are low cost, precision, fully integrated
12-/16-bit converters offering a programmable current source
output designed to meet the requirements of industrial process
control applications. The output current range is programmable
at 4 mA to 20 mA, 0 mA to 20 mA, or an overrange function of
0 mA to 24 mA. The output is open-circuit protected. The device
operates with a power supply (AVDD) range from 10.8 V to
60 V. Output loop compliance is 0 V to AVDD − 2.5 V.
The flexible serial interface is SPI, MICROWIRE™, QSPI™, and
DSP compatible and can be operated in 3-wire mode to mini-
mize the digital isolation required in isolated applications.
The device also includes a power-on reset function, ensuring
that the device powers up in a known state, and an asynchronous
CLEAR pin that sets the output to the low end of the selected
current range.
The total unadjusted error is typically ±0.01% FSR.
COMPANION PRODUCTS
HART Modem: AD5700, AD5700-1
DVCC
SELECT
FUNCTIONAL BLOCK DIAGRAM
DVCC
CAP1
CAP2
AV DD
CLEAR
AD5410/AD5420
R3SENSE
R2 R3
BOOST
LATCH
SCLK
SDIN
SDO
INPUT SHIFT
REGISTER
AND CONTROL
LOGIC
12/16
12-/16-BIT
DAC
POWER-
ON
RESET
VREF
RSET
IOUT
FAULT
RSET
REFOUT
REFIN
Figure 1.
GND
Rev. H
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




AD5410 pdf
Data Sheet
AD5410/AD5420
Parameter1
Output Impedance
Output Current Leakage
R3 Resistor Value
R3 Resistor Temperature Coefficient (TC)
IBIAS Current
IBIAS Current Temperature Coefficient (TC)
REFERENCE INPUT/OUTPUT
Reference Input3
Reference Input Voltage
DC Input Impedance
Reference Output
Output Voltage
Reference TC3, 4
Output Noise (0.1 Hz to 10 Hz)3
Noise Spectral Density3
Output Voltage Drift vs. Time3
Capacitive Load3
Load Current3
Short-Circuit Current3
Load Regulation3
DIGITAL INPUTS3
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current
Pin Capacitance
DIGITAL OUTPUTS3
SDO
Output Low Voltage, VOL
Output High Voltage, VOH
High Impedance Leakage Current
High Impedance Output Capacitance
FAULT
Output Low Voltage, VOL
Output Low Voltage, VOL
Output High Voltage, VOH
POWER REQUIREMENTS
AVDD
DVCC
Input Voltage
Output Voltage
Output Load Current3
Short-Circuit Current3
AIDD
DICC
Power Dissipation
Min Typ Max
50
60
36 40 44
30
399 444 489
30
4.95
25
4.995
2
−1
5 5.05
30
5.000
1.8
18
100
50
600
5
7
95
5.005
10
0.8
+1
10
DVCC − 0.5
−1
5
0.6
3.6
10.8
10.8
2.7
4.5
5
20
144
50
0.4
+1
0.4
40
60
5.5
3
4
1
Unit
MΩ
pA
ppm/°C
µA
ppm/°C
Test Conditions/Comments
Output disabled
TA = 25°C
V
kΩ
V
ppm/°C
µV p-p
nV/√Hz
ppm
nF
mA
mA
ppm/mA
V
V
µA
pF
For specified performance
TA = 25°C
At 10 kHz
Drift after 1000 hours, TA = 125°C
JEDEC compliant
Per pin
Per pin
V Sinking 200 µA
V Sourcing 200 µA
µA
pF
V 10 kΩ pull-up resistor to DVCC
V 2.5 mA load current
V 10 kΩ pull-up resistor to DVCC
V TSSOP package
V LFCSP package
V Internal supply disabled
V DVCC can be overdriven up to 5.5 V
mA
mA
mA Output disabled
mA Output enabled
mA VIH = DVCC, VIL = GND
mW AVDD = 40 V, IOUT = 0 mA
mW AVDD = 15 V, IOUT = 0 mA
1 Temperature range: −40°C to +85°C; typical at +25°C.
2 For 0 mA to 20 mA and 0 mA to 24 mA ranges, INL is measured from Code 256 for the AD5420 and Code 16 for the AD5410.
3 Guaranteed by design and characterization but not production tested.
4 The on-chip reference is production trimmed and tested at 25°C and 85°C. It is characterized from −40°C to +85°C.
Rev. H | Page 5 of 30

5 Page





AD5410 arduino
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
0.004
0.002
0
EXTERNAL RSET
INTERNAL RSET
EXTERNAL RSET, BOOST TRANSISTOR
INTERNAL RSET, BOOST TRANSISTOR
–0.002
–0.004
–0.006
–0.008
AVDD = 2.4V
TA = 25°C
RLOAD = 250
–0.010
0
10,000 20,000
30,000 40,000
CODE
50,000
Figure 7. Integral Nonlinearity Error vs. Code
60,000
1.0
AVDD = 24V
0.8 TA = 25°C
RLOAD = 250
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
EXTERNAL RSET
INTERNAL RSET
EXTERNAL RSET, BOOST TRANSISTOR
INTERNAL RSET, BOOST TRANSISTOR
10,000 20,000 30,000 40,000 50,000 60,000
CODE
Figure 8. Differential Nonlinearity Error vs. Code
0.05
0.03
0.01
–0.01
–0.03
–0.05
–0.07
AVDD = 24V
TA = 25°C
RLOAD = 250
–0.09
–0.11
–0.13
–0.15
0
EXTERNAL RSET
INTERNAL RSET
EXTERNAL RSET, BOOST TRANSISTOR
INTERNAL RSET, BOOST TRANSISTOR
10,000 20,000 30,000 40,000 50,000
CODE
Figure 9. Total Unadjusted Error vs. Code
60,000
AD5410/AD5420
0.004
0.002
AVDD = 24V
0mA TO 24mA RANGE
0
–0.002
–0.004
–0.006
–0.008
–0.010
–40
–20
0 20 40 60 80
TEMPERATURE (°C)
Figure 10. Integral Nonlinearity Error vs. Temperature, Internal RSET
0.003
0.002
AVDD = 24V
0mA TO 24mA RANGE
0.001
0
–0.001
–0.002
–0.003
–40
–20
0 20 40 60 80
TEMPERATURE (°C)
Figure 11. Integral Nonlinearity Error vs. Temperature, External RSET
1.0
AVDD = 24V
0.8 ALL RANGES
INTERNAL AND EXTERNAL RSET
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
–40
–20
0 20 40 60 80
TEMPERATURE (°C)
Figure 12. Differential Nonlinearity Error vs. Temperature
Rev. H | Page 11 of 30

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