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PDF TC554161AFTI-85L Data sheet ( Hoja de datos )

Número de pieza TC554161AFTI-85L
Descripción STATIC RAM
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TC554161AFTI-85L Hoja de datos, Descripción, Manual

TC554161AFTI-70,-85,-10,-70L,-85L,-10L
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT STATIC RAM
DESCRIPTION
The TC554161AFTI is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by
16bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V ±
10% power supply. Advanced circuit technology provides both high speed and low power at an operating current of
10 mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 2 mA standby
current (typ) when chip enable ( CE ) is asserted high. There are two control inputs. CE is used to select the device
and for data retention control, and output enable ( OE ) provides fast memory access. Data byte control pin ( LB ,
UB ) provides lower and upper byte access. This device is well suited to various microprocessor system applications
where high speed, low power and battery backup are required. And, with a guaranteed operating extreme
temperature range of -40° to 85°C, the TC554161AFTI can be used in environments exhibiting extreme
temperature conditions. The TC554161AFTI is available in a plastic 54-pin thin -small-outline package (TSOP).
FEATURES
· Low-power dissipation
Operating: 55 mW/MHz (typical)
· Single power supply voltage of 5 V ± 10%
· Power down features using CE .
· Data retention supply voltage of 2 to 5.5 V
· Direct TTL compatibility for all inputs and outputs
· Wide operating temperature range of -40° to 85°C
· Standby Current (maximum):
TC554161AFTI
-70,-85,-10 -70L,-85L,-10L
5.5 V
3.0 V
200 mA
100 mA
100 mA
50 mA
· Access Times (maximum):
TC554161AFTI
-70,-70L -85,-85L -10,-10L
Access Time
70 ns 85 ns 100 ns
CE Access Time
70 ns
85 ns 100 ns
OE Access Time
35 ns
45 ns 50 ns
· Package:
TSOP II54-P-400-0.80 (AFTI) (Weight: 0.57 g typ)
PIN ASSIGNMENT (TOP VIEW)
PIN NAMES
NC
A3
A2
A1
A0
I/O16
I/O15
VDD
GND
I/O14
I/O13
UB
CE
OP
R/W
I/O12
I/O11
GND
VDD
I/O10
I/O9
NC
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54 A4
53 A5
52 A6
51 A7
50 NC
49 I/O1
48 I/O2
47 VDD
46 GND
45 I/O3
44 I/O4
43 LB
42 OE
41 OP
40 NC
39 I/O5
38 I/O6
37 GND
36 VDD
35 I/O7
34 I/O8
33 A8
32 A9
31 A10
30 A11
29 A12
28 NC
(Normal pinout)
A0~A17 Address Inputs
I/O1~I/O16 Data Inputs/Outputs
CE Chip Enable
R/W Read/Write Control
OE Output Enable
LB , UB Data Byte Control
VDD
GND
Power (+5 V)
Ground
NC No Connection
OP* Option
*: OP pin must be open of connected to GND.
2001-08-17 1/10

1 page




TC554161AFTI-85L pdf
TC554161AFTI-70,-85,-10,-70L,-85L,-10L
AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = -40° to 85°C, VDD = 5 V ± 10%)
READ CYCLE
SYMBOL
PARAMETER
tRC
tACC
tCO
tOE
tBA
tOH
tCOE
tOEE
tBE
tOD
tODO
tBD
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Data Byte Control Access Time
Output Data Hold Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
-70,-70L
MIN MAX
70 ¾
¾ 70
¾ 70
¾ 35
¾ 35
10 ¾
5¾
0¾
0¾
¾ 30
¾ 30
¾ 30
TC554161AFTI
-85,-85L
MIN MAX
85 ¾
¾ 85
¾ 85
¾ 45
¾ 45
10 ¾
5¾
0¾
0¾
¾ 35
¾ 35
¾ 35
-10,-10L
MIN MAX
100 ¾
¾ 100
¾ 100
¾ 50
¾ 50
10 ¾
5¾
0¾
0¾
¾ 40
¾ 40
¾ 40
UNIT
ns
WRITE CYCLE
SYMBOL
PARAMETER
tWC
tWP
tCW
tBW
tAS
tWR
tDS
tDH
tOEW
tODW
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Byte Control to End of Write
Address Setup Time
Write Recovery Time
Data Setup Time
Data Hold Time
R/W High to Output Active
R/W Low to Output High-Z
AC TEST CONDITIONS
PARAMETER
Output load
Input pulse level
Timing measurements
Reference level
tR, tF
-70,-70L
MIN MAX
70 ¾
50 ¾
60 ¾
50 ¾
0¾
0¾
30 ¾
0¾
0¾
¾ 30
TC554161AFTI
-85,-85L
MIN MAX
85 ¾
55 ¾
70 ¾
55 ¾
0¾
0¾
35 ¾
0¾
0¾
¾ 35
-10,-10L
MIN MAX
100 ¾
60 ¾
80 ¾
60 ¾
0¾
0¾
40 ¾
0¾
0¾
¾ 40
UNIT
ns
TEST CONDITION
100 pF + 1 TTL Gate
0.4 V, 2.6 V
1.5 V
1.5 V
5 ns
2001-08-17 5/10

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