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PDF FPF2147 Datasheet ( Hoja de datos )

Número de pieza FPF2147
Descripción Full Function Load Switch
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo
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Total 13 Páginas
		
FPF2147 datasheet

1 Page

FPF2147 pdf
Typical Characteristics
90
85
80
75
70
65
60
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
SUPPLY VOLTAGE (V)
Figure 1. Quiescent Current vs. Input Voltage
110
105
100
95
90
85
80
75
70
65
60
55
50
-40
VIN = 5.5V
VIN = 3.3V
VIN = 1.8V
-15 10 35 60
TJ, JUNCTION TEMPERATURE (°C)
85
Figure 2. Quiescent Current vs. Temperature
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
SUPPLY VOLTAGE (V)
Figure 3. VON High Voltage vs. Input Voltage
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
SUPPLY VOLTAGE (V)
Figure 4. VON Low Voltage vs. Input Voltage
200
190
180
170
160
150
140
130
120
110
100
90
80
1
234
VIN, SUPPLY VOLTAGE (V)
Figure 5. RON vs. VIN
5
240
220
200
180
160
140
120
100
80
60
6 -40
VIN= 1.8V
VIN= 3.3V
VIN= 5.5V
-15 10 35 60
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. RON vs. Temperature
85
FPF2140/42/43/44/46/47 Rev. I
5
www.fairchildsemi.com

5 Page

FPF2147 arduino
Application Notes
Startup Power Sequence
VIN1 FPF2140/2/ VOUT1
3/4/6/7
VIN1
PGOOD
FLAGB
OFF ON ON GND
100K
To Load
VIN2 FPF2140/2/ VOUT2
3/4/6/7
VIN2
PGOOD
FLAGB
ON GND
100K
TP
To Load
Power good function in sequential startup. No battery is loaded to the output
Power Good
FPF214X family has a "Power Good" feature. PGOOD pin is an
open-drain MOSFET which asserts high when the output
voltage reaches 90% of the input voltage.
PGOOD pin requires an external pull up resistor that is
connected to the output voltage when there is no battery in the
load side and the logic level of the subsequent controller
permits. This would give logic levels similar to a CMOS output
stage for PGOOD, while still keeping the option to tie the pull-up
to a different supply voltage. A typical value of 100Kis
recommended to be used as pull up resistor. The PGOOD pin
status is independent of the ON pin position. This mean that
PGOOD pin stays low when the load switch is OFF. If the Power
Good feature is not used in the application the pin can be
connected directly to GND.
Sequential Startup using Power Good
The power good pin can be connected to another load switch's
enable pin to implement sequential startup. PGOOD pin asserts
low when the load switch is OFF. This feature allows driving a
subsequent circuit. The above diagram illustrates power good
function in sequential startup. As the VOUT1 of the first load
switch starts to ramp to the 90% of its input voltage the second
switch remains in OFF state. Whereas the VOUT1 passes the
90% threshold, power good signal becomes active and asserts
high. This signal will turn on the second load switch and VOUT2
will start to increase. The total startup time may vary according
to the difference between supply voltages that are used in the
application.
FPF2140/42/43/44/46/47 Rev. I
11
www.fairchildsemi.com

11 Page





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