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PDF AD5173 Data sheet ( Hoja de datos )

Número de pieza AD5173
Descripción Dual-Channel I2C Digital Potentiometers
Fabricantes Analog Devices 
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Data Sheet
256-Position, One-Time Programmable,
Dual-Channel, I2C Digital Potentiometers
AD5172/AD5173
FEATURES
2-channel, 256-position potentiometers
One-time programmable (OTP) set-and-forget resistance
setting provides a low cost alternative to EEMEM
Unlimited adjustments prior to OTP activation
OTP overwrite allows dynamic adjustments with user-
defined preset
End-to-end resistance: 2.5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ
Compact 10-lead MSOP: 3 mm × 4.9 mm
Fast settling time: tS = 5 μs typical on power-up
Full read/write of wiper register
Power-on preset to midscale
Extra package address decode pins: AD0 and AD1 (AD5173 )
Single supply: 2.7 V to 5.5 V
Low temperature coefficient: 35 ppm/°C
Low power: IDD = 6 μA maximum
Wide operating temperature: −40°C to +125°C
FUNCTIONAL BLOCK DIAGRAMS
A1 W1 B1
A2 W2 B2
VDD
GND
FUSE
LINKS
12
RDAC
REGISTER 1
RDAC
REGISTER 2
SDA
SCL
/8
SERIAL INPUT
REGISTER
Figure 1. AD5172 Functional Block Diagram
W1 B1
W2 B2
APPLICATIONS
Systems calibration
Electronics level setting
Mechanical trimmers replacement in new designs
Permanent factory PCB setting
Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment
GENERAL DESCRIPTION
The AD5172/AD5173 are dual-channel, 256-position, one-time
programmable (OTP) digital potentiometers1 that employ fuse
link technology to achieve memory retention of resistance
settings. OTP is a cost-effective alternative to EEMEM for users
who do not need to program the digital potentiometer setting
in memory more than once. These devices perform the same
electronic adjustment function as mechanical potentiometers or
variable resistors but with enhanced resolution, solid-state reliabil-
ity, and superior low temperature coefficient performance.
The AD5172/AD5173 are programmed using a 2-wire, I2C®-
compatible digital interface. Unlimited adjustments are allowed
VDD
GND
FUSE
LINKS
12
RDAC
REGISTER 1
RDAC
REGISTER 2
AD0 ADDRESS
/AD1
DECODE
8
SDA
SCL
SERIAL INPUT
REGISTER
Figure 2. AD5173 Functional Block Diagram
before permanently setting the resistance value. During OTP
activation, a permanent blow fuse command freezes the wiper
position (analogous to placing epoxy on a mechanical trimmer).
Unlike traditional OTP digital potentiometers, the AD5172/
AD5173 have a unique temporary OTP overwrite feature that
allows for new adjustments even after a fuse is blown. However,
the OTP setting is restored during subsequent power-up condi-
tions. This allows users to treat these digital potentiometers as
volatile potentiometers with a programmable preset.
1 The terms digital potentiometer, VR, and RDAC are used interchangeably.
Rev. I
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




AD5173 pdf
Data Sheet
AD5172/AD5173
Parameter
VW Settling Time
Resistor Noise Voltage Density
Symbol
tS
eN_WB
Conditions
VA = 5 V, VB = 0 V, ±1 LSB
error band
RWB = 1.25 kΩ, RS = 0 Ω
Min Typ1 Max
1
3.2
Unit
µs
nV/√Hz
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from the ideal between successive tap positions. Parts are guaranteed monotonic.
3 VA = VDD, VB = 0 V, wiper (VW) = no connect.
4 Specifications apply to all VRs.
5 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
6 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
7 Guaranteed by design, but not subject to production test.
8 Measured at Terminal A. Terminal A is open circuited in shutdown mode.
9 The minimum voltage requirement on the VIH is 0.7 V × VDD. For example, VIH minimum = 3.5 V when VDD = 5 V. It is typical for the SCL and SDA resistors to be pulled up to VDD.
However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up resistors.
10 Different from the operating power supply; the power supply for OTP is used one time only.
11 Different from the operating current; the supply current for OTP lasts approximately 400 ms for one time only.
12 See Figure 30 for an energy plot during an OTP program.
13 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
14 All dynamic characteristics use VDD = 5 V.
ELECTRICAL CHARACTERISTICS: 10 kΩ, 50 kΩ, AND 100 kΩ
VDD = 5 V ± 10% or 3 V ± 10%; VA = VDD; VB = 0 V; −40°C < TA < +125°C; unless otherwise noted.
Table 2.
Parameter
DC CHARACTERISTICS—RHEOSTAT MODE
Resistor Differential Nonlinearity2
Resistor Integral Nonlinearity2
Nominal Resistor Tolerance3
Resistance Temperature Coefficient
Wiper Resistance
DC CHARACTERISTICS—POTENTIOMETER DIVIDER
MODE4
Differential Nonlinearity5
Integral Nonlinearity5
Voltage Divider Temperature Coefficient
Full-Scale Error
Zero-Scale Error
RESISTOR TERMINALS
Voltage Range6
Capacitance A, B7
Capacitance W7
Shutdown Supply Current8
Common-Mode Leakage
DIGITAL INPUTS AND OUTPUTS
SDA and SCL
Input Logic High9
Input Logic Low9
AD0 and AD1
Input Logic High
Input Logic Low
Input Current
Input Capacitance7
Symbol
Conditions
R-DNL
R-INL
ΔRAB
(ΔRAB/RAB)/ΔT
RWB
RWB, VA = no connect
RWB, VA = no connect
TA = 25°C
Code = 0x00, VDD = 5 V
DNL
INL
(ΔVW/VW)/ΔT
VWFSE
VWZSE
Code = 0x80
Code = 0xFF
Code = 0x00
VA, VB, VW
CA, CB
CW
IA_SD
ICM
f = 1 MHz, measured to
GND, code = 0x80
f = 1 MHz, measured to
GND, code = 0x80
VDD = 5.5 V
VA = VB = VDD/2
VIH VDD = 5 V
VIL VDD = 5 V
VIH VDD = 3 V
VIL VDD = 3 V
IIL VIN = 0 V or 5 V
CIL
Min
−1
−2.5
−20
−1
−1
−2.5
0
GND
0.7 VDD
−0.5
2.1
Typ 1
±0.1
±0.25
35
160
±0.1
±0.3
15
−1
1
45
60
0.01
1
5
Max
+1
+2.5
+20
200
+1
+1
0
2.5
VDD
1
VDD + 0.5
+0.3 VDD
0.6
±1
Unit
LSB
LSB
%
ppm/°C
LSB
LSB
ppm/°C
LSB
LSB
V
pF
pF
µA
nA
V
V
V
V
µA
pF
Rev. I | Page 5 of 28

5 Page





AD5173 arduino
Data Sheet
2.0
1.5 VDD = 2.7V
TA = –40°C, +25°C, +85°C, +125°C
1.0
RAB = 10kΩ
0.5
0
–0.5
–1.0
VDD = 5.5V
TA = –40°C, +25°C, +85°C, +125°C
–1.5
–2.0
0
32 64 96 128 160 192 224
CODE (DECIMAL)
Figure 12. R-INL vs. Code vs. Temperature
256
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0
RAB = 10kΩ
VDD = 2.7V, 5.5V; TA = –40°C, +25°C, +85°C, +125°C
32 64 96 128 160 192 224
CODE (DECIMAL)
Figure 13. R-DNL vs. Code vs. Temperature
256
2.0
RAB = 10kΩ
1.5
1.0
0.5
0
–0.5
VDD = 5.5V, VA = 5.0V
–1.0
–1.5
VDD = 2.7V, VA = 2.7V
–2.0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 14. Full-Scale Error vs. Temperature
AD5172/AD5173
4.50
3.75
RAB = 10kΩ
3.00
2.25
1.50
0.75
VDD = 2.7V, VA = 2.7V
VDD = 5.5V, VA = 5.0V
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
Figure 15. Zero-Scale Error vs. Temperature
10
VDD = 5V
1
VDD = 3V
0.1
–40
–7 26 59 92
TEMPERATURE (°C)
Figure 16. Supply Current vs. Temperature
125
120
RAB = 10kΩ
100
80
60 VDD = 2.7V
TA = –40°C TO +85°C, –40°C TO +125°C
40
VDD = 5.5V
TA = –40°C TO +85°C, –40°C TO +125°C
20
0
–20
0
32 64 96 128 160 192 224 256
CODE (DECIMAL)
Figure 17. Rheostat Mode Tempco ΔRWB/ΔT vs. Code
Rev. I | Page 11 of 28

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